From 5fa8b30577260bafe87e08293ec33e8fd986e293 Mon Sep 17 00:00:00 2001 From: Taylor R Campbell Date: Tue, 23 Aug 2022 13:51:41 +0000 Subject: [PATCH] WIP: radeon: track down framebuffer mapping flags --- sys/arch/x86/x86/genfb_machdep.c | 2 +- sys/arch/x86/x86/pmap.c | 12 ++++++++++-- sys/external/bsd/drm2/dist/drm/radeon/radeon_fb.c | 1 + .../bsd/drm2/dist/drm/radeon/radeon_object.c | 14 +++++++++++++- sys/external/bsd/drm2/dist/drm/ttm/ttm_bo.c | 3 +++ sys/external/bsd/drm2/dist/drm/ttm/ttm_bo_util.c | 10 ++++++++++ 6 files changed, 38 insertions(+), 4 deletions(-) diff --git a/sys/arch/x86/x86/genfb_machdep.c b/sys/arch/x86/x86/genfb_machdep.c index 2a3082bdd417..0fc08bc7640d 100644 --- a/sys/arch/x86/x86/genfb_machdep.c +++ b/sys/arch/x86/x86/genfb_machdep.c @@ -59,7 +59,7 @@ __KERNEL_RCSID(0, "$NetBSD: genfb_machdep.c,v 1.18 2022/08/14 23:09:30 riastradh #if NWSDISPLAY > 0 && NGENFB > 0 struct vcons_screen x86_genfb_console_screen; -bool x86_genfb_use_shadowfb = false; +bool x86_genfb_use_shadowfb = true; #if NACPICA > 0 extern int acpi_md_vesa_modenum; diff --git a/sys/arch/x86/x86/pmap.c b/sys/arch/x86/x86/pmap.c index 87c3d84717e9..514bfbf4ea0b 100644 --- a/sys/arch/x86/x86/pmap.c +++ b/sys/arch/x86/x86/pmap.c @@ -957,9 +957,10 @@ pat_init(struct cpu_info *ci) #ifndef XENPV uint64_t pat; - if (!(ci->ci_feat_val[0] & CPUID_PAT)) + if (!(ci->ci_feat_val[0] & CPUID_PAT)) { + printf("%s: no PAT\n", cpu_name(ci)); return; - + } /* We change WT to WC. Leave all other entries the default values. */ pat = PATENTRY(0, PAT_WB) | PATENTRY(1, PAT_WC) | PATENTRY(2, PAT_UCMINUS) | PATENTRY(3, PAT_UC) | @@ -968,6 +969,7 @@ pat_init(struct cpu_info *ci) wrmsr(MSR_CR_PAT, pat); cpu_pat_enabled = true; + printf("%s: pat=0x%"PRIx64" enabled\n", cpu_name(ci), pat); #endif } @@ -984,6 +986,10 @@ pmap_pat_flags(u_int flags) * the cpuid PAT but PAT "disabled" */ return PTE_PCD; + case PMAP_WRITE_COMBINE: + printf("%s: ignoring PMAP_WRITE_COMBINE without PAT\n", + __func__); + return 0; default: return 0; } @@ -993,6 +999,8 @@ pmap_pat_flags(u_int flags) case PMAP_NOCACHE: return PGC_UC; case PMAP_WRITE_COMBINE: + printf("%s: setting PGC_WC=0x%x for PMAP_WRITE_COMBINE with PAT\n", + __func__, (unsigned)PGC_WC); return PGC_WC; case PMAP_WRITE_BACK: return PGC_WB; diff --git a/sys/external/bsd/drm2/dist/drm/radeon/radeon_fb.c b/sys/external/bsd/drm2/dist/drm/radeon/radeon_fb.c index 6a6e19dbaf96..d199ea12608c 100644 --- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_fb.c +++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_fb.c @@ -256,6 +256,7 @@ static int radeonfb_create(struct drm_fb_helper *helper, } rbo = gem_to_radeon_bo(gobj); + printf("%s:%d: bo=%p\n", __func__, __LINE__, &rbo->tbo); #ifdef __NetBSD__ ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj); diff --git a/sys/external/bsd/drm2/dist/drm/radeon/radeon_object.c b/sys/external/bsd/drm2/dist/drm/radeon/radeon_object.c index 6d160155ec57..7f683e73c571 100644 --- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_object.c +++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_object.c @@ -184,6 +184,11 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; else rbo->placements[i].lpfn = 0; + printf("%s:%d: bo=%p placement[%u] fpfn=0x%x lpfn=0x%x flags=0x%x\n", + __func__, __LINE__, &rbo->tbo, i, + rbo->placements[i].fpfn, + rbo->placements[i].lpfn, + rbo->placements[i].flags); } } @@ -240,6 +245,8 @@ int radeon_bo_create(struct radeon_device *rdev, /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit * See https://bugs.freedesktop.org/show_bug.cgi?id=84627 */ + printf("%s:%d: clear WC|UC in 0x%x -> 0x%x\n", __func__, __LINE__, + bo->flags, bo->flags & ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC)); bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); #elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT) /* Don't try to enable write-combining when it can't work, or things @@ -254,13 +261,18 @@ int radeon_bo_create(struct radeon_device *rdev, if (bo->flags & RADEON_GEM_GTT_WC) DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for " "better performance thanks to write-combining\n"); + printf("%s:%d: clear WC|UC in 0x%x -> 0x%x\n", __func__, __LINE__, + bo->flags, bo->flags & ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC)); bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); #else /* For architectures that don't support WC memory, * mask out the WC flag from the BO */ - if (!drm_arch_can_wc_memory()) + if (!drm_arch_can_wc_memory()) { + printf("%s:%d: clear WC in 0x%x -> 0x%x\n", __func__, __LINE__, + bo->flags, bo->flags & ~RADEON_GEM_GTT_WC); bo->flags &= ~RADEON_GEM_GTT_WC; + } #endif radeon_ttm_placement_from_domain(bo, domain); diff --git a/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo.c b/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo.c index 063ce959e30d..a88b5a89b13f 100644 --- a/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo.c +++ b/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo.c @@ -1284,6 +1284,9 @@ int ttm_bo_validate(struct ttm_buffer_object *bo, if (ret) return ret; } + printf("%s:%d: bo=%p mem_type=0x%x placement=0x%x is_iomem=%d\n", + __func__, __LINE__, + bo, bo->mem.mem_type, bo->mem.placement, bo->mem.bus.is_iomem); return 0; } EXPORT_SYMBOL(ttm_bo_validate); diff --git a/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo_util.c b/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo_util.c index 035c49a0fefd..0312d3cd11a1 100644 --- a/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo_util.c +++ b/sys/external/bsd/drm2/dist/drm/ttm/ttm_bo_util.c @@ -644,6 +644,8 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo, struct ttm_mem_reg *mem = &bo->mem; if (bo->mem.bus.addr) { + printf("%s:%d: bo=%p placement=0x%x premapped %p\n", + __func__, __LINE__, bo, mem->placement, bo->mem.bus.addr); map->bo_kmap_type = ttm_bo_map_premapped; map->virtual = (void *)(((u8 *)bo->mem.bus.addr) + offset); } else { @@ -657,6 +659,8 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo, addr = (bo->mem.bus.base + bo->mem.bus.offset + offset); if (ISSET(mem->placement, TTM_PL_FLAG_WC)) flags |= BUS_SPACE_MAP_PREFETCHABLE; + printf("%s:%d: bo=%p placement=0x%x bus_space_map flags=0x%x\n", + __func__, __LINE__, bo, mem->placement, flags); /* XXX errno NetBSD->Linux */ ret = -bus_space_map(bo->bdev->memt, addr, size, flags, &map->u.io.memh); @@ -664,6 +668,8 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo, return ret; map->u.io.size = size; map->virtual = bus_space_vaddr(bo->bdev->memt, map->u.io.memh); + printf("%s:%d: mapped bo=0x%"PRIxBUSADDR" at %p\n", + __func__, __LINE__, addr, map->virtual); } #else if (mem->placement & TTM_PL_FLAG_WC) @@ -698,6 +704,8 @@ static int ttm_bo_kmap_ttm(struct ttm_buffer_object *bo, return ret; if (num_pages == 1 && (mem->placement & TTM_PL_FLAG_CACHED)) { + printf("%s:%d: bo=%p placement=0x%x kmap\n", + __func__, __LINE__, bo, mem->placement); /* * We're mapping a single page, and the desired * page protection is consistent with the bo. @@ -717,6 +725,8 @@ static int ttm_bo_kmap_ttm(struct ttm_buffer_object *bo, * or to make the buffer object look contiguous. */ prot = ttm_io_prot(mem->placement, PAGE_KERNEL); + printf("%s:%d: bo=%p placement=0x%x vmap prot=0x%x\n", + __func__, __LINE__, bo, mem->placement, prot); map->bo_kmap_type = ttm_bo_map_vmap; map->virtual = vmap(ttm->pages + start_page, num_pages, 0, prot);