From f57b09ce38e99bbd27eaa1984ff9c0a40e777155 Mon Sep 17 00:00:00 2001 From: Taylor R Campbell Date: Thu, 31 Mar 2022 00:35:43 +0000 Subject: [PATCH 11/49] riscv/membar_ops: Upgrade membar_enter from W/RW to RW/RW. This will be deprecated soon but let's avoid leaving rakes to trip on with it arising from disagreement over the documentation (W/RW) and implementation and usage (R/RW). --- common/lib/libc/arch/riscv/atomic/membar_ops.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/lib/libc/arch/riscv/atomic/membar_ops.S b/common/lib/libc/arch/riscv/atomic/membar_ops.S index 03d303ab4293..20aa64af3449 100644 --- a/common/lib/libc/arch/riscv/atomic/membar_ops.S +++ b/common/lib/libc/arch/riscv/atomic/membar_ops.S @@ -39,7 +39,7 @@ ATOMIC_OP_ALIAS(membar_sync,_membar_sync) CRT_ALIAS(__sync_synchronize,_membar_sync) ENTRY_NP(_membar_enter) - fence w,rw + fence rw,rw ret END(_membar_enter) ATOMIC_OP_ALIAS(membar_enter,_membar_enter)