From 781023563c1bfe32df5ebacb347568772f0e57fa Mon Sep 17 00:00:00 2001 From: Taylor R Campbell Date: Tue, 1 Jun 2021 10:41:29 +0000 Subject: [PATCH] x86: Reset cached tsc in every lwp to 0 on suspend/resume. This avoids spuriously warning about tsc going backwards, which is to be expected after a suspend/resume cycle. --- sys/arch/x86/acpi/acpi_wakeup.c | 1 + sys/arch/x86/x86/tsc.c | 15 +++++++++++++++ sys/arch/x86/x86/tsc.h | 6 ++++++ 3 files changed, 22 insertions(+) diff --git a/sys/arch/x86/acpi/acpi_wakeup.c b/sys/arch/x86/acpi/acpi_wakeup.c index 271587a88a48..0c45b252a2d8 100644 --- a/sys/arch/x86/acpi/acpi_wakeup.c +++ b/sys/arch/x86/acpi/acpi_wakeup.c @@ -341,6 +341,7 @@ acpi_md_sleep(int state) */ /* We just woke up (cpu0), execution is resumed here */ + tsc_tc_reset(); cpu_init_msrs(&cpu_info_primary, false); fpuinit(&cpu_info_primary); if (rcr4() & CR4_OSXSAVE) diff --git a/sys/arch/x86/x86/tsc.c b/sys/arch/x86/x86/tsc.c index f940a1a2820e..a17ce564bcbe 100644 --- a/sys/arch/x86/x86/tsc.c +++ b/sys/arch/x86/x86/tsc.c @@ -440,3 +440,18 @@ tsc_get_timecount(struct timecounter *tc) return cpu_counter32(); #endif } + +/* + * tsc has been reset; zero the cached tsc of every lwp in the system + * so we don't spuriously report that the tsc has gone backward. + * Caller must ensure all LWPs are quiescent (except the current one, + * obviously) and interrupts are blocked while we update this. + */ +void +tsc_tc_reset(void) +{ + struct lwp *l; + + LIST_FOREACH(l, &alllwp, l_list) + l->l_md.md_tsc = 0; +} diff --git a/sys/arch/x86/x86/tsc.h b/sys/arch/x86/x86/tsc.h index 14c1eb39a9e7..8fb7f7c1d9c5 100644 --- a/sys/arch/x86/x86/tsc.h +++ b/sys/arch/x86/x86/tsc.h @@ -26,6 +26,9 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef _X86_TSC_H_ +#define _X86_TSC_H_ + bool tsc_is_invariant(void); void tsc_setfunc(struct cpu_info *); void tsc_tc_init(void); @@ -34,3 +37,6 @@ void tsc_sync_bp(struct cpu_info *); void tsc_sync_drift(int64_t); void tsc_user_enable(void); void tsc_user_disable(void); +void tsc_tc_reset(void); + +#endif /* _X86_TSC_H_ */