Index: sys/arch/arm/arm32/cpuswitch.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/cpuswitch.S,v
retrieving revision 1.88
diff -u -p -r1.88 cpuswitch.S
--- sys/arch/arm/arm32/cpuswitch.S	24 Mar 2015 07:16:16 -0000	1.88
+++ sys/arch/arm/arm32/cpuswitch.S	24 Mar 2015 08:52:15 -0000
@@ -405,11 +405,6 @@ ENTRY_NP(softint_switch)
 	 */
 	mrc	p15, 0, r0, c13, c0, 2
 	str	r0, [r2, #(PCB_USER_PID_RW)]
-	/*
-	 * Now restore l_private for the softint thread.
-	 */
-	ldr	r0, [r5, #(L_PRIVATE)]
-	mcr	p15, 0, r0, c13, c0, 3
 #endif
 
 	/* this is an invariant so load before disabling intrs */
@@ -444,10 +439,6 @@ ENTRY_NP(softint_switch)
 	/*
 	 * If we've returned, we need to change everything back and return.
 	 */
-#ifdef _ARM_ARCH_6
-	ldr	r0, [r4, #(L_PRIVATE)]	/* get pinned lwp's l_private */
-	mcr	p15, 0, r0, c13, c0, 3	/* and restore it */
-#endif
 	ldr	r2, [r4, #(L_PCB)]	/* get pinned lwp's pcb */
 
 #ifndef __HAVE_UNNESTED_INTRS