? sys/arch/riscv/cscope.out
? sys/arch/riscv/riscv/fpu.c.new
Index: sys/arch/riscv/include/pte.h
===================================================================
RCS file: /cvsroot/src/sys/arch/riscv/include/pte.h,v
retrieving revision 1.7
diff -u -p -r1.7 pte.h
--- sys/arch/riscv/include/pte.h	21 Sep 2022 06:34:30 -0000	1.7
+++ sys/arch/riscv/include/pte.h	30 Sep 2022 06:03:01 -0000
@@ -72,7 +72,7 @@ typedef uint32_t pd_entry_t;
 #define	PTE_V		__BIT(0)	// Valid
 
 #define PTE_HARDWIRED	(PTE_A | PTE_D)
-#define PTE_KERN	(PTE_V | PTE_G)
+#define PTE_KERN	(PTE_V | PTE_G | PTE_A | PTE_D)
 #define PTE_RW		(PTE_R | PTE_W)
 #define PTE_RX		(PTE_R | PTE_X)
 
Index: sys/arch/riscv/riscv/locore.S
===================================================================
RCS file: /cvsroot/src/sys/arch/riscv/riscv/locore.S,v
retrieving revision 1.28
diff -u -p -r1.28 locore.S
--- sys/arch/riscv/riscv/locore.S	28 Sep 2022 06:05:28 -0000	1.28
+++ sys/arch/riscv/riscv/locore.S	30 Sep 2022 06:03:02 -0000
@@ -190,7 +190,7 @@ ENTRY_NP(start)
 
 	call	clear_bss		// zero through kernel_end (inc. stack)
 
-	li	s7, PTE_KERN		// for megapages
+	li	s7, PTE_V		// page table pointer {X,W,R} = {0,0,0}
 
 	// We allocated the kernel first PDE page so let's insert in the
 	// page table.