? sys/cscope.out
? sys/arch/evbarm/rpi/rpi.h.new
Index: sys/arch/arm/broadcom/bcm2835_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/broadcom/bcm2835_intr.c,v
retrieving revision 1.9
diff -u -p -r1.9 bcm2835_intr.c
--- sys/arch/arm/broadcom/bcm2835_intr.c	12 Apr 2015 23:25:57 -0000	1.9
+++ sys/arch/arm/broadcom/bcm2835_intr.c	27 Apr 2015 15:37:59 -0000
@@ -69,6 +69,9 @@ static void bcm2836mp_pic_source_name(st
     size_t);
 #ifdef MULTIPROCESSOR
 int bcm2836mp_ipi_handler(void *);
+#ifdef DDB
+int bcm2836mp_ipi_ddb_handler(void *);
+#endif
 static void bcm2836mp_cpu_init(struct pic_softc *, struct cpu_info *);
 static void bcm2836mp_send_ipi(struct pic_softc *, const kcpuset_t *, u_long);
 #endif
@@ -216,6 +219,8 @@ bcm2835_icu_attach(device_t parent, devi
 
 	bcmicu_sc = sc;
 
+	pic_add(sc->sc_pic, BCM2835_INT_BASE);
+
 #if defined(BCM2836)
 #if defined(MULTIPROCESSOR)
 	aprint_normal(": Multiprocessor");
@@ -223,8 +228,6 @@ bcm2835_icu_attach(device_t parent, devi
 
 	bcm2836mp_intr_init(curcpu());
 #endif
-	pic_add(sc->sc_pic, BCM2835_INT_BASE);
-
 	aprint_normal("\n");
 }
 
@@ -334,7 +337,7 @@ bcm2835_pic_source_name(struct pic_softc
 #if defined(BCM2836)
 
 #define	BCM2836MP_TIMER_IRQS	__BITS(3,0)
-#define	BCM2836MP_MAILBOX_IRQS	__BITS(4,4)
+#define	BCM2836MP_MAILBOX_IRQS	__BITS(4,5)
 
 #define	BCM2836MP_ALL_IRQS	\
     (BCM2836MP_TIMER_IRQS | BCM2836MP_MAILBOX_IRQS)
@@ -405,7 +408,6 @@ bcm2836mp_pic_block_irqs(struct pic_soft
 		    BCM2836_LOCAL_MAILBOX_IRQ_CONTROLN(cpuid),
 		    val);
 	}
-
 	bcm2835_barrier();
 	return;
 }
@@ -427,9 +429,11 @@ bcm2836mp_pic_find_pending_irqs(struct p
 
 	lpending &= ~BCM2836_INTBIT_GPUPENDING;
 	if (lpending & BCM2836MP_ALL_IRQS) {
-		ipl |= pic_mark_pending_sources(pic, 0 /* BCM2836_INT_LOCALBASE */,
+		ipl |= pic_mark_pending_sources(pic, 0,
 		    lpending & BCM2836MP_ALL_IRQS);
 	}
+	KASSERTMSG((lpending & ~BCM2836MP_ALL_IRQS) == 0, "lpending %08x",
+	    lpending);
 
 	return ipl;
 }
@@ -455,9 +459,19 @@ bcm2836mp_pic_source_name(struct pic_sof
 static void bcm2836mp_cpu_init(struct pic_softc *pic, struct cpu_info *ci)
 {
 
-	/* Enable IRQ and not FIQ */
+#define MAILBOX0_IRQ	__BIT(0)
+#define MAILBOX1_IRQ	__BIT(1)
+#define TIMER_CNTVIRQ	__BIT(3)
+
+	/* Enable MAILBOX0 and MAILBOX1 IRQ and not FIQ */
+	bus_space_write_4(al_iot, al_ioh,
+	    BCM2836_LOCAL_MAILBOX_IRQ_CONTROLN(ci->ci_cpuid),
+	    MAILBOX0_IRQ | MAILBOX1_IRQ);
+
+	/* Enable TIMER0 CNTVIRQ IRQ and not FIQ */
 	bus_space_write_4(al_iot, al_ioh,
-	    BCM2836_LOCAL_MAILBOX_IRQ_CONTROLN(ci->ci_cpuid), 1);
+	    BCM2836_LOCAL_TIMER_IRQ_CONTROLN(ci->ci_cpuid),
+	    TIMER_CNTVIRQ);
 }
 
 
@@ -465,10 +479,46 @@ static void
 bcm2836mp_send_ipi(struct pic_softc *pic, const kcpuset_t *kcp, u_long ipi)
 {
 	const cpuid_t cpuid = pic - &bcm2836mp_pic[0];
+	const uint32_t bit = __BIT(ipi);
+#ifdef DDB
+	const bool ipi_ddb = (ipi == IPI_DDB);
+#else
+	const bool ipi_ddb = false;
+#endif
+	if (kcp != NULL)
+		KASSERTMSG(kcpuset_isset(kcp, cpuid), "kcp %p pic %p ipi %ld", kcp, pic, ipi);
+	/*
+	 * Send all but IPI_DDB via mailbox0.
+	 * IPI_DDB goes via mailbox1
+	 */
+	if (__predict_true(!ipi_ddb)) {
+		bus_space_write_4(al_iot, al_ioh,
+		    BCM2836_LOCAL_MAILBOX0_SETN(cpuid), bit);
+	} else {
+		bus_space_write_4(al_iot, al_ioh,
+		    BCM2836_LOCAL_MAILBOX1_SETN(cpuid), bit);
+	}
+}
 
-	bus_space_write_4(al_iot, al_ioh,
-	    BCM2836_LOCAL_MAILBOX0_SETN(cpuid), __BIT(ipi));
+#ifdef DDB
+int
+bcm2836mp_ipi_ddb_handler(void *priv)
+{
+	const struct cpu_info *ci = curcpu();
+	const cpuid_t cpuid = ci->ci_cpuid;
+	uint32_t ipimask;
+
+	ipimask = bus_space_read_4(al_iot, al_ioh,
+	    BCM2836_LOCAL_MAILBOX1_CLRN(cpuid));
+	bus_space_write_4(al_iot, al_ioh, BCM2836_LOCAL_MAILBOX1_CLRN(cpuid),
+	    ipimask);
+
+	KASSERT(ipimask == __BIT(IPI_DDB));
+	pic_ipi_ddb(priv);
+
+	return 1;
 }
+#endif
 
 int
 bcm2836mp_ipi_handler(void *priv)
@@ -477,37 +527,34 @@ bcm2836mp_ipi_handler(void *priv)
 	const cpuid_t cpuid = ci->ci_cpuid;
 	uint32_t ipimask, bit;
 
-	ipimask = bus_space_read_4(al_iot, al_ioh,
-	    BCM2836_LOCAL_MAILBOX0_CLRN(cpuid));
-	bus_space_write_4(al_iot, al_ioh, BCM2836_LOCAL_MAILBOX0_CLRN(cpuid),
-	    ipimask);
+	while ((ipimask = bus_space_read_4(al_iot, al_ioh,
+	    BCM2836_LOCAL_MAILBOX0_CLRN(cpuid))), ipimask != 0) {
 
-	while ((bit = ffs(ipimask)) > 0) {
-		const u_int ipi = bit - 1;
-		switch (ipi) {
-		case IPI_AST:
-		case IPI_NOP:
+		while ((bit = ffs(ipimask)) > 0) {
+			const u_int ipi = bit - 1;
+			switch (ipi) {
+			case IPI_AST:
+			case IPI_NOP:
 #ifdef __HAVE_PREEMPTION
-		case IPI_KPREEMPT:
-#endif
-			pic_ipi_nop(priv);
-			break;
-		case IPI_XCALL:
-			pic_ipi_xcall(priv);
-			break;
-		case IPI_GENERIC:
-			pic_ipi_generic(priv);
-			break;
-		case IPI_SHOOTDOWN:
-			pic_ipi_shootdown(priv);
-			break;
-#ifdef DDB
-		case IPI_DDB:
-			pic_ipi_ddb(priv);
-			break;
+			case IPI_KPREEMPT:
 #endif
+				pic_ipi_nop(priv);
+				break;
+			case IPI_XCALL:
+				pic_ipi_xcall(priv);
+				break;
+			case IPI_GENERIC:
+				pic_ipi_generic(priv);
+				break;
+			case IPI_SHOOTDOWN:
+				pic_ipi_shootdown(priv);
+				break;
+			}
+			ipimask &= ~__BIT(ipi);
+
+			bus_space_write_4(al_iot, al_ioh,
+			    BCM2836_LOCAL_MAILBOX0_CLRN(cpuid), __BIT(ipi));
 		}
-		ipimask &= ~__BIT(ipi);
 	}
 
 	return 1;
@@ -522,8 +569,12 @@ bcm2836mp_intr_init(struct cpu_info *ci)
 	pic->pic_cpus = ci->ci_kcpuset;
 	pic_add(pic, BCM2836_INT_BASECPUN(cpuid));
 
-	intr_establish(BCM2836_INT_MAILBOX0_CPUN(cpuid), IPL_VM,
+	intr_establish(BCM2836_INT_MAILBOX0_CPUN(cpuid), IPL_HIGH,
 	    IST_LEVEL | IST_MPSAFE, bcm2836mp_ipi_handler, NULL);
+#ifdef DDB
+	intr_establish(BCM2836_INT_MAILBOX1_CPUN(cpuid), IPL_HIGH,
+	    IST_LEVEL | IST_MPSAFE, bcm2836mp_ipi_ddb_handler, NULL);
+#endif
 
 	/* clock interrupt will attach with gtmr */
 	if (cpuid == 0)
Index: sys/arch/arm/broadcom/bcm2835reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/broadcom/bcm2835reg.h,v
retrieving revision 1.15
diff -u -p -r1.15 bcm2835reg.h
--- sys/arch/arm/broadcom/bcm2835reg.h	12 Apr 2015 17:32:39 -0000	1.15
+++ sys/arch/arm/broadcom/bcm2835reg.h	27 Apr 2015 15:37:59 -0000
@@ -153,6 +153,7 @@
 
 #define	BCM2836_INT_CNTVIRQ_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ)
 #define	BCM2836_INT_MAILBOX0_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0)
+#define	BCM2836_INT_MAILBOX1_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX1)
 #else
 #define	BCM2835_INT_BASE		0
 #endif /* !BCM2836 */