Index: sys/arch/aarch64/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/aarch64/include/ptrace.h,v
retrieving revision 1.4
diff -u -p -r1.4 ptrace.h
--- sys/arch/aarch64/include/ptrace.h	25 Sep 2015 16:05:17 -0000	1.4
+++ sys/arch/aarch64/include/ptrace.h	11 Apr 2017 08:00:52 -0000
@@ -57,6 +57,7 @@
 #define PTRACE_REG_INTRV(r)	(r)->r_reg[0]
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0xd4, 0x20, 0x01, 0xa0 })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile(".word 0xa00120d4" ::: "memory")
 #define PTRACE_BREAKPOINT_SIZE	4
 
 #elif defined(__arm__)
Index: sys/arch/alpha/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/alpha/include/ptrace.h,v
retrieving revision 1.8
diff -u -p -r1.8 ptrace.h
--- sys/arch/alpha/include/ptrace.h	25 Sep 2015 16:05:17 -0000	1.8
+++ sys/arch/alpha/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -53,4 +53,5 @@
 #define PTRACE_REG_INTRV(r)	(r)->r_regs[R_V0]
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0x80, 0x00, 0x00, 0x00 })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile("bpt" ::: "memory")
 #define PTRACE_BREAKPOINT_SIZE	4
Index: sys/arch/amd64/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/amd64/include/ptrace.h,v
retrieving revision 1.11
diff -u -p -r1.11 ptrace.h
--- sys/arch/amd64/include/ptrace.h	8 Apr 2017 00:25:49 -0000	1.11
+++ sys/arch/amd64/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -64,6 +64,7 @@
 #define PTRACE_REG_INTRV(r)	(r)->regs[_REG_RAX]
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0xcc })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile ("int3" : : : "memory")
 #define PTRACE_BREAKPOINT_SIZE	1
 #define PTRACE_BREAKPOINT_ADJ	1
 
Index: sys/arch/arm/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/ptrace.h,v
retrieving revision 1.10
diff -u -p -r1.10 ptrace.h
--- sys/arch/arm/include/ptrace.h	8 Apr 2017 00:25:49 -0000	1.10
+++ sys/arch/arm/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -64,5 +64,7 @@
 #define PTRACE_REG_SP(_r)		(_r)->r_sp
 #define PTRACE_REG_INTRV(_r)		(_r)->r[0]
 
-#define PTRACE_BREAKPOINT	((const uint8_t[]) { 0xe7, 0xff, 0xff, 0xff })
+#define PTRACE_BREAKPOINT	((const uint8_t[]) { 0xe7, 0xff, 0xff, 0xfe })
+#define PTRACE_BREAKPOINT_INSN	0xe7fffffe
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile (".word " ___STRING(PTRACE_BREAKPOINT_INSN) )
 #define PTRACE_BREAKPOINT_SIZE	4
Index: sys/arch/hppa/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/hppa/include/ptrace.h,v
retrieving revision 1.7
diff -u -p -r1.7 ptrace.h
--- sys/arch/hppa/include/ptrace.h	8 Apr 2017 00:25:49 -0000	1.7
+++ sys/arch/hppa/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -58,4 +58,5 @@
 #define PTRACE_REG_INTRV(r)	(r)->r_regs[28]
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0x00, 0x01, 0x00, 0x04 })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile("break	%0, %1" :: "i" (HPPA_BREAK_KERNEL), "i" (HPPA_BREAK_SS) : "memory")
 #define PTRACE_BREAKPOINT_SIZE	4
Index: sys/arch/m68k/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/m68k/include/ptrace.h,v
retrieving revision 1.11
diff -u -p -r1.11 ptrace.h
--- sys/arch/m68k/include/ptrace.h	8 Apr 2017 00:25:49 -0000	1.11
+++ sys/arch/m68k/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -59,6 +59,7 @@
 #define PTRACE_REG_INTRV(r)	(r)->r_regs[0]
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0x4e, 0x4f })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile("trap #15" ::: "memory")
 #define PTRACE_BREAKPOINT_SIZE	2
 
 #endif /* !_M68K_PTRACE_H_ */
Index: sys/arch/mips/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/include/ptrace.h,v
retrieving revision 1.15
diff -u -p -r1.15 ptrace.h
--- sys/arch/mips/include/ptrace.h	8 Apr 2017 00:25:49 -0000	1.15
+++ sys/arch/mips/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -67,6 +67,7 @@
 #define PTRACE_REG_INTRV(r)	(r)->r_regs[2]
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0x00, 0x00, 0x00, 0x0d })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile("break")
 #define PTRACE_BREAKPOINT_SIZE	4
 
 /*
Index: sys/arch/powerpc/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/include/ptrace.h,v
retrieving revision 1.13
diff -u -p -r1.13 ptrace.h
--- sys/arch/powerpc/include/ptrace.h	8 Apr 2017 00:25:49 -0000	1.13
+++ sys/arch/powerpc/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -26,6 +26,9 @@
 #define PTRACE_REG_SP(r)	(r)->fixreg[1]
 #define PTRACE_REG_INTRV(r)	(r)->fixreg[3]
 
+#define	PTRACE_BREAKPOINT_ASM	__asm __volatile ("nop")
+#define	PTRACE_BREAKPOINT_SIZE	4
+
 #ifdef _KERNEL
 #ifdef _KERNEL_OPT
 #include "opt_altivec.h"
Index: sys/arch/sh3/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sh3/include/ptrace.h,v
retrieving revision 1.13
diff -u -p -r1.13 ptrace.h
--- sys/arch/sh3/include/ptrace.h	8 Apr 2017 00:25:49 -0000	1.13
+++ sys/arch/sh3/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -71,7 +71,9 @@
 #define PTRACE_REG_SP(r)	r->r_r15
 #define PTRACE_REG_INTV(r)	r->r_r0
 
+#define PTRACE_BREAKPOINT_TRAP	0xc3
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0xc3, 0xc3 })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile("trapa %0" :: "i"(PTRACE_BREAKPOINT_TRAP))
 #define PTRACE_BREAKPOINT_SIZE	2
 
 #ifdef _KERNEL
Index: sys/arch/sparc/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc/include/ptrace.h,v
retrieving revision 1.10
diff -u -p -r1.10 ptrace.h
--- sys/arch/sparc/include/ptrace.h	25 Nov 2016 14:10:31 -0000	1.10
+++ sys/arch/sparc/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -64,4 +64,5 @@
 #define PTRACE_REG_INTRV(r)	((register_t)(r)->r_out[0])
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0x91, 0xd0, 0x20, 0x01 })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile("ta 1")
 #define PTRACE_BREAKPOINT_SIZE	4
Index: sys/arch/vax/include/ptrace.h
===================================================================
RCS file: /cvsroot/src/sys/arch/vax/include/ptrace.h,v
retrieving revision 1.8
diff -u -p -r1.8 ptrace.h
--- sys/arch/vax/include/ptrace.h	11 Apr 2017 07:45:36 -0000	1.8
+++ sys/arch/vax/include/ptrace.h	11 Apr 2017 08:00:53 -0000
@@ -54,4 +54,5 @@
 #define PTRACE_REG_INTRV(r)	(r)->r0
 
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0x03 })
+#define PTRACE_BREAKPOINT_ASM	__asm __volatile("bpt")
 #define PTRACE_BREAKPOINT_SIZE	1
Index: tests/lib/libc/sys/t_ptrace_wait.c
===================================================================
RCS file: /cvsroot/src/tests/lib/libc/sys/t_ptrace_wait.c,v
retrieving revision 1.3
diff -u -p -r1.3 t_ptrace_wait.c
--- tests/lib/libc/sys/t_ptrace_wait.c	10 Apr 2017 16:45:57 -0000	1.3
+++ tests/lib/libc/sys/t_ptrace_wait.c	11 Apr 2017 08:01:04 -0000
@@ -5771,11 +5771,8 @@ ATF_TC_BODY(signal3, tc)
 		FORKEE_ASSERT(raise(sigval) == 0);
 
 		printf("Before raising software breakpoint from child\n");
-#if defined(__x86_64__)
-		__asm__ __volatile__ ("int3\n;");
-#else
-		/*  port me */
-#endif
+
+		PTRACE_BREAKPOINT_ASM;
 
 		printf("Before exiting of the child process\n");
 		_exit(exitval);
@@ -5831,9 +5828,6 @@ ATF_TC_BODY(signal4, tc)
 	int happy;
 
 #if defined(__arm__)
-	/* PT_STEP not supported on arm 32-bit */
-	atf_tc_expect_fail("PR kern/51918 PR kern/52119");
-#else
 	atf_tc_expect_fail("PR kern/52119");
 #endif