diff --git a/sys/arch/arm/pic/pic_splfuncs.c b/sys/arch/arm/pic/pic_splfuncs.c
index 8427c26730a6..05cdec9b793e 100644
--- a/sys/arch/arm/pic/pic_splfuncs.c
+++ b/sys/arch/arm/pic/pic_splfuncs.c
@@ -50,43 +50,53 @@ __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.8 2018/04/01 04:35:04 ryo Exp $")
 int
 _splraise(int newipl)
 {
+	register_t psw = cpsid(I32_bit);
 	struct cpu_info * const ci = curcpu();
 	const int oldipl = ci->ci_cpl;
 	KASSERT(newipl < NIPL);
 	if (newipl > ci->ci_cpl) {
 		pic_set_priority(ci, newipl);
 	}
+	if ((psw & I32_bit) == 0)
+		cpsie(I32_bit);
+
 	return oldipl;
 }
 int
 _spllower(int newipl)
 {
+	register_t psw = cpsid(I32_bit);
 	struct cpu_info * const ci = curcpu();
 	const int oldipl = ci->ci_cpl;
 	KASSERT(panicstr || newipl <= ci->ci_cpl);
 	if (newipl < ci->ci_cpl) {
-		register_t psw = cpsid(I32_bit);
 		ci->ci_intr_depth++;
 		pic_do_pending_ints(psw, newipl, NULL);
 		ci->ci_intr_depth--;
 		if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
 			cpsie(I32_bit);
 		cpu_dosoftints();
+		return oldipl;
 	}
+
+	if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
+		cpsie(I32_bit);
 	return oldipl;
 }
 
 void
 splx(int savedipl)
 {
+	register_t psw = cpsid(I32_bit);
 	struct cpu_info * const ci = curcpu();
 	KASSERT(savedipl < NIPL);
 
 	if (__predict_false(savedipl == ci->ci_cpl)) {
+		if ((psw & I32_bit) == 0)
+			cpsie(I32_bit);
 		return;
 	}
 
-	register_t psw = cpsid(I32_bit);
 	KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
 	    "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);