Index: sys/arch/evbmips/evbmips/interrupt.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbmips/evbmips/interrupt.c,v
retrieving revision 1.22
diff -u -p -r1.22 interrupt.c
--- sys/arch/evbmips/evbmips/interrupt.c	6 Jun 2015 22:22:03 -0000	1.22
+++ sys/arch/evbmips/evbmips/interrupt.c	26 Aug 2016 06:26:35 -0000
@@ -40,8 +40,6 @@ __KERNEL_RCSID(0, "$NetBSD: interrupt.c,
 #include <mips/locore.h>
 #include <mips/mips3_clock.h>
 
-struct clockframe cf;
-
 void
 intr_init(void)
 {
@@ -74,12 +72,15 @@ cpu_intr(int ppl, vaddr_t pc, uint32_t s
 		    "%s: cpl (%d) != ipl (%d)", __func__, ci->ci_cpl, ipl);
 		KASSERT(pending != 0);
 
-		cf.pc = pc;
-		cf.sr = status;
-		cf.intr = (ci->ci_idepth > 1);
 
 #ifdef MIPS3_ENABLE_CLOCK_INTR
 		if (pending & MIPS_INT_MASK_5) {
+			struct clockframe cf;
+
+			cf.pc = pc;
+			cf.sr = status;
+			cf.intr = (ci->ci_idepth > 1);
+
 			KASSERTMSG(ipl == IPL_SCHED,
 			    "%s: ipl (%d) != IPL_SCHED (%d)",
 			     __func__, ipl, IPL_SCHED);