Index: sys/arch/mips/include/asm.h
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/include/asm.h,v
retrieving revision 1.60
diff -u -p -r1.60 asm.h
--- sys/arch/mips/include/asm.h	10 Aug 2020 14:37:38 -0000	1.60
+++ sys/arch/mips/include/asm.h	12 Aug 2020 07:50:22 -0000
@@ -57,6 +57,13 @@
 #include <sys/cdefs.h>		/* for API selection */
 #include <mips/regdef.h>
 
+#define	__BIT(n)	(1 << (n))
+#define	__BITS(hi,lo)	((~((~0)<<((hi)+1)))&((~0)<<(lo)))
+
+#define	__LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask))
+#define	__SHIFTOUT(__x, __mask) (((__x) & (__mask)) / __LOWEST_SET_BIT(__mask))
+#define	__SHIFTIN(__x, __mask) ((__x) * __LOWEST_SET_BIT(__mask))
+
 /*
  * Define -pg profile entry code.
  * Must always be noreorder, must never use a macro instruction
Index: sys/arch/mips/mips/genassym.cf
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/mips/genassym.cf,v
retrieving revision 1.70
diff -u -p -r1.70 genassym.cf
--- sys/arch/mips/mips/genassym.cf	20 Jul 2020 03:22:39 -0000	1.70
+++ sys/arch/mips/mips/genassym.cf	12 Aug 2020 07:50:23 -0000
@@ -185,8 +185,6 @@ define	V_MIPS3_PG_ASID		ilog2(__LOWEST_S
 define	S_MIPS3_PG_ASID		ilog2(MIPS3_PG_ASID+1)
 endif
 
-define	MIPS_EBASE_CPUNUM	MIPS_EBASE_CPUNUM
-
 define	TF_SIZ			sizeof(struct trapframe)
 define	TF_REG_ZERO		offsetof(struct trapframe, tf_regs[_R_ZERO])
 define	TF_REG_AST		offsetof(struct trapframe, tf_regs[_R_AST])