Index: sys/arch/arm/arm32/genassym.cf
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/genassym.cf,v
retrieving revision 1.46
diff -u -p -u -r1.46 genassym.cf
--- sys/arch/arm/arm32/genassym.cf	7 Apr 2011 10:03:47 -0000	1.46
+++ sys/arch/arm/arm32/genassym.cf	2 Aug 2012 06:23:49 -0000
@@ -142,8 +142,6 @@ define	TF_R0			offsetof(struct trapframe
 define	TF_R10			offsetof(struct trapframe, tf_r10)
 define	TF_PC			offsetof(struct trapframe, tf_pc)
 
-define	IF_PC			offsetof(struct irqframe, if_pc)
-
 define	PROCSIZE		sizeof(struct proc)
 define	TRAPFRAMESIZE		sizeof(struct trapframe)
 
Index: sys/arch/arm/at91/at91aic.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/at91/at91aic.c,v
retrieving revision 1.8
diff -u -p -u -r1.8 at91aic.c
--- sys/arch/arm/at91/at91aic.c	4 Nov 2011 17:16:38 -0000	1.8
+++ sys/arch/arm/at91/at91aic.c	2 Aug 2012 06:23:49 -0000
@@ -362,10 +362,10 @@ at91aic_intr_disestablish(void *cookie)
 #include <arm/at91/at91dbgureg.h>
 #include <arm/at91/at91pdcreg.h>
 
-static inline void intr_process(struct intrq *iq, int pcpl, struct irqframe *frame);
+static inline void intr_process(struct intrq *iq, int pcpl, struct trapframe *frame);
 
 static inline void
-intr_process(struct intrq *iq, int pcpl, struct irqframe *frame)
+intr_process(struct intrq *iq, int pcpl, struct trapframe *frame)
 {
 	struct intrhand*	ih;
 	u_int			oldirqstate, intr;
@@ -404,7 +404,7 @@ intr_process(struct intrq *iq, int pcpl,
 }
 
 void
-at91aic_intr_dispatch(struct irqframe *frame)
+at91aic_intr_dispatch(struct trapframe *frame)
 {
 	struct intrq*		iq;
 	int			pcpl = curcpl();
Index: sys/arch/arm/at91/at91aicvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/at91/at91aicvar.h,v
retrieving revision 1.3
diff -u -p -u -r1.3 at91aicvar.h
--- sys/arch/arm/at91/at91aicvar.h	23 Oct 2009 06:53:13 -0000	1.3
+++ sys/arch/arm/at91/at91aicvar.h	2 Aug 2012 06:23:49 -0000
@@ -57,6 +57,6 @@ void at91aic_init(void);
 void *at91aic_intr_establish(int irq, int ipl, int type, int (*ih_func)(void *), void *arg);
 void at91aic_intr_disestablish(void *cookie);
 void at91aic_intr_poll(void *ihp, int flags);
-void at91aic_intr_dispatch(struct irqframe *frame);
+void at91aic_intr_dispatch(struct trapframe *frame);
 
 #endif /* _AT91AICVAR_H_ */
Index: sys/arch/arm/at91/at91busvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/at91/at91busvar.h,v
retrieving revision 1.4
diff -u -p -u -r1.4 at91busvar.h
--- sys/arch/arm/at91/at91busvar.h	1 Jul 2011 19:31:16 -0000	1.4
+++ sys/arch/arm/at91/at91busvar.h	2 Aug 2012 06:23:49 -0000
@@ -75,7 +75,7 @@ struct at91bus_softc {
 	bus_dma_tag_t		sc_dmat;
 };
 
-struct irqframe;
+struct trapframe;
 
 struct at91bus_machdep {
 	/* initialization: */
@@ -95,7 +95,7 @@ struct at91bus_machdep {
 	void *(*intr_establish)(int pid, int ipl, int type, int (*ih_func)(void *), void *arg);
 	void (*intr_disestablish)(void *cookie);
 	void (*intr_poll)(void *cookie, int flags);
-	void (*intr_dispatch)(struct irqframe *);
+	void (*intr_dispatch)(struct trapframe *);
 
 	/* configuration */
 	const char *(*peripheral_name)(int pid);
Index: sys/arch/arm/ep93xx/ep93xx_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ep93xx/ep93xx_intr.c,v
retrieving revision 1.16
diff -u -p -u -r1.16 ep93xx_intr.c
--- sys/arch/arm/ep93xx/ep93xx_intr.c	1 Jul 2011 19:31:17 -0000	1.16
+++ sys/arch/arm/ep93xx/ep93xx_intr.c	2 Aug 2012 06:23:50 -0000
@@ -69,7 +69,7 @@ volatile u_int32_t vic2_intr_enabled;
 /* Interrupts pending. */
 static volatile int ipending;
 
-void	ep93xx_intr_dispatch(struct irqframe *frame);
+void	ep93xx_intr_dispatch(struct trapframe *);
 
 #define VIC1REG(reg)	*((volatile u_int32_t*) (EP93XX_AHB_VBASE + \
 	EP93XX_AHB_VIC1 + (reg)))
@@ -324,7 +324,7 @@ ep93xx_intr_disestablish(void *cookie)
 }
 
 void
-ep93xx_intr_dispatch(struct irqframe *frame)
+ep93xx_intr_dispatch(struct trapframe *frame)
 {
 	struct intrq*		iq;
 	struct intrhand*	ih;
Index: sys/arch/arm/include/cpu.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.64
diff -u -p -u -r1.64 cpu.h
--- sys/arch/arm/include/cpu.h	16 Jul 2012 06:26:43 -0000	1.64
+++ sys/arch/arm/include/cpu.h	2 Aug 2012 06:23:50 -0000
@@ -149,7 +149,7 @@ extern int cpu_do_powersave;
  * frame came from USR mode or not.
  */
 #ifdef __PROG32
-#define CLKF_USERMODE(frame)	((frame->cf_if.if_spsr & PSR_MODE) == PSR_USR32_MODE)
+#define CLKF_USERMODE(frame)	((frame->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE)
 #else
 #define CLKF_USERMODE(frame)	((frame->cf_if.if_r15 & R15_MODE) == R15_MODE_USR)
 #endif
@@ -162,7 +162,7 @@ extern int cpu_do_powersave;
 /* Hack to treat FPE time as interrupt time so we can measure it */
 #define CLKF_INTR(frame)						\
 	((curcpu()->ci_intr_depth > 1) ||				\
-	    (frame->cf_if.if_spsr & PSR_MODE) == PSR_UND32_MODE)
+	    (frame->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE)
 #else
 #define CLKF_INTR(frame)	(curcpu()->ci_intr_depth > 1) 
 #endif
@@ -171,7 +171,7 @@ extern int cpu_do_powersave;
  * CLKF_PC: Extract the program counter from a clockframe
  */
 #ifdef __PROG32
-#define CLKF_PC(frame)		(frame->cf_if.if_pc)
+#define CLKF_PC(frame)		(frame->cf_tf.tf_pc)
 #else
 #define CLKF_PC(frame)		(frame->cf_if.if_r15 & R15_PC)
 #endif
Index: sys/arch/arm/include/arm32/frame.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/frame.h,v
retrieving revision 1.29
diff -u -p -u -r1.29 frame.h
--- sys/arch/arm/include/arm32/frame.h	1 Aug 2012 22:46:07 -0000	1.29
+++ sys/arch/arm/include/arm32/frame.h	2 Aug 2012 06:23:50 -0000
@@ -54,31 +54,8 @@
  * System stack frames.
  */
 
-typedef struct irqframe {
-	unsigned int if_spsr;
-	unsigned int if_fill;	/* fill here so r0 will dword aligned */
-	unsigned int if_r0;
-	unsigned int if_r1;
-	unsigned int if_r2;
-	unsigned int if_r3;
-	unsigned int if_r4;
-	unsigned int if_r5;
-	unsigned int if_r6;
-	unsigned int if_r7;
-	unsigned int if_r8;
-	unsigned int if_r9;
-	unsigned int if_r10;
-	unsigned int if_r11;
-	unsigned int if_r12;
-	unsigned int if_usr_sp;
-	unsigned int if_usr_lr;
-	unsigned int if_svc_sp;
-	unsigned int if_svc_lr;
-	unsigned int if_pc;
-} irqframe_t;
-
 struct clockframe {
-	struct irqframe cf_if;
+	struct trapframe cf_tf;
 };
 
 /*
@@ -286,13 +263,13 @@ LOCK_CAS_DEBUG_LOCALS
 	and	r0, r0, #(PSR_MODE)	/* check for SVC32 mode */	;\
 	teq	r0, #(PSR_SVC32_MODE)					;\
 	bne	99f			/* nope, get out now */		;\
-	ldr	r0, [sp, #(IF_PC)]					;\
+	ldr	r0, [sp, #(TF_PC)]					;\
 	ldr	r1, .L_lock_cas_end					;\
 	cmp	r0, r1							;\
 	bge	99f							;\
 	ldr	r1, .L_lock_cas						;\
 	cmp	r0, r1							;\
-	strgt	r1, [sp, #(IF_PC)]					;\
+	strgt	r1, [sp, #(TF_PC)]					;\
 	LOCK_CAS_DEBUG_COUNT_RESTART					;\
 99:
 
Index: sys/arch/arm/ixp12x0/ixp12x0_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ixp12x0/ixp12x0_intr.c,v
retrieving revision 1.22
diff -u -p -u -r1.22 ixp12x0_intr.c
--- sys/arch/arm/ixp12x0/ixp12x0_intr.c	1 Jul 2011 20:27:50 -0000	1.22
+++ sys/arch/arm/ixp12x0/ixp12x0_intr.c	2 Aug 2012 06:23:50 -0000
@@ -74,7 +74,7 @@ volatile u_int32_t pci_intr_enabled;
 /* Interrupts pending. */
 static volatile int ipending;
 
-void	ixp12x0_intr_dispatch(struct irqframe *frame);
+void	ixp12x0_intr_dispatch(struct trapframe *);
 
 #define IXPREG(reg)	*((volatile u_int32_t*) (reg))
 
@@ -382,7 +382,7 @@ ixp12x0_intr_disestablish(void *cookie)
 }
 
 void
-ixp12x0_intr_dispatch(struct irqframe *frame)
+ixp12x0_intr_dispatch(struct trapframe *frame)
 {
 	struct intrq*		iq;
 	struct intrhand*	ih;
Index: sys/arch/arm/xscale/becc_icu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/becc_icu.c,v
retrieving revision 1.12
diff -u -p -u -r1.12 becc_icu.c
--- sys/arch/arm/xscale/becc_icu.c	20 Dec 2010 00:25:29 -0000	1.12
+++ sys/arch/arm/xscale/becc_icu.c	2 Aug 2012 06:23:50 -0000
@@ -117,7 +117,7 @@ const char * const becc_irqnames[] = {
 	"irq 31",
 };
 
-void	becc_intr_dispatch(struct irqframe *frame);
+void	becc_intr_dispatch(struct trapframe *frame);
 
 static inline uint32_t
 becc_icsr_read(void)
@@ -335,7 +335,7 @@ becc_intr_disestablish(void *cookie)
 }
 
 void
-becc_intr_dispatch(struct irqframe *frame)
+becc_intr_dispatch(struct trapframe *frame)
 {
 	struct intrq *iq;
 	struct intrhand *ih;
Index: sys/arch/arm/xscale/i80200_icu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80200_icu.c,v
retrieving revision 1.9
diff -u -p -u -r1.9 i80200_icu.c
--- sys/arch/arm/xscale/i80200_icu.c	24 Dec 2005 20:06:52 -0000	1.9
+++ sys/arch/arm/xscale/i80200_icu.c	2 Aug 2012 06:23:50 -0000
@@ -54,10 +54,10 @@ __KERNEL_RCSID(0, "$NetBSD: i80200_icu.c
 static volatile uint32_t intctl;
 
 /* Pointer to board-specific external IRQ dispatcher. */
-void	(*i80200_extirq_dispatch)(struct irqframe *);
+void	(*i80200_extirq_dispatch)(struct trapframe *);
 
 static void
-i80200_default_extirq_dispatch(struct irqframe *framep)
+i80200_default_extirq_dispatch(struct trapframe *framep)
 {
 
 	panic("external IRQ with no dispatch routine");
Index: sys/arch/arm/xscale/i80200var.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80200var.h,v
retrieving revision 1.5
diff -u -p -u -r1.5 i80200var.h
--- sys/arch/arm/xscale/i80200var.h	29 Jul 2012 00:07:10 -0000	1.5
+++ sys/arch/arm/xscale/i80200var.h	2 Aug 2012 06:23:50 -0000
@@ -43,7 +43,7 @@ void	i80200_icu_init(void);
 void	i80200_intr_enable(uint32_t);
 void	i80200_intr_disable(uint32_t);
 
-struct irqframe;
-extern void (*i80200_extirq_dispatch)(struct irqframe *);
+struct trapframe;
+extern void (*i80200_extirq_dispatch)(struct trapframe *);
 
 #endif /* _ARM_XSCALE_I80200VAR_H_ */
Index: sys/arch/arm/xscale/i80321_icu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80321_icu.c,v
retrieving revision 1.23
diff -u -p -u -r1.23 i80321_icu.c
--- sys/arch/arm/xscale/i80321_icu.c	12 Feb 2012 16:31:01 -0000	1.23
+++ sys/arch/arm/xscale/i80321_icu.c	2 Aug 2012 06:23:50 -0000
@@ -434,7 +434,7 @@ i80321_intr_dispatch(struct clockframe *
 				 * triggered interrupt will just keep
 				 * coming back.
 				 */
-				frame->cf_if.if_spsr |= I32_bit;
+				frame->cf_tf.tf_spsr |= I32_bit;
 			}
 #endif
 			i80321_ipending |= ibit;
@@ -469,7 +469,7 @@ i80321_intr_dispatch(struct clockframe *
 			 * Here's hoping the handler really did clear
 			 * down the source...
 			 */
-			frame->cf_if.if_spsr &= ~I32_bit;
+			frame->cf_tf.tf_spsr &= ~I32_bit;
 		}
 #endif
 		ci->ci_cpl = ppl;
Index: sys/arch/evbarm/iq80310/iq80310_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq80310/iq80310_intr.c,v
retrieving revision 1.29
diff -u -p -u -r1.29 iq80310_intr.c
--- sys/arch/evbarm/iq80310/iq80310_intr.c	1 Jul 2011 20:41:16 -0000	1.29
+++ sys/arch/evbarm/iq80310/iq80310_intr.c	2 Aug 2012 06:23:51 -0000
@@ -92,7 +92,7 @@ static const int si_to_ipl[SI_NQUEUES] =
 };
 #endif
 
-void	iq80310_intr_dispatch(struct irqframe *frame);
+void	iq80310_intr_dispatch(struct trapframe *frame);
 
 static inline uint32_t
 iq80310_intstat_read(void)
@@ -404,7 +404,7 @@ iq80310_intr_disestablish(void *cookie)
 }
 
 void
-iq80310_intr_dispatch(struct irqframe *frame)
+iq80310_intr_dispatch(struct trapframe *frame)
 {
 	struct intrq *iq;
 	struct intrhand *ih;