Index: sys/arch/mips/include/psl.h
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/include/psl.h,v
retrieving revision 1.19
diff -u -p -r1.19 psl.h
--- sys/arch/mips/include/psl.h	30 Jul 2016 06:27:45 -0000	1.19
+++ sys/arch/mips/include/psl.h	10 Sep 2016 13:51:19 -0000
@@ -60,6 +60,9 @@
 	 MIPS3_SR_EXL |		\
 	 MIPS3_INT_MASK)
 
+#define	MIPS3_PSL_IE 		\
+	(MIPS_SR_INT_IE)
+
 #define	MIPS3_USERMODE(ps) \
 	(((ps) & MIPS3_SR_KSU_MASK) == MIPS3_SR_KSU_USER)
 
@@ -75,6 +78,11 @@
 	 MIPS1_SR_INT_ENA_PREV |\
 	 MIPS_INT_MASK)
 
+#define	MIPS1_PSL_IE		\
+	(MIPS1_SR_INT_ENA_OLD |	\
+	 MIPS1_SR_INT_ENA_PREV |\
+	 MIPS_SR_INT_IE)
+
 #define	MIPS1_USERMODE(ps) \
 	((ps) & MIPS1_SR_KU_PREV)
 
@@ -84,6 +92,7 @@
 
 #if defined(MIPS3_PLUS) && !defined(MIPS1) /* mips3 or greater only */
 # define  PSL_LOWIPL	MIPS3_PSL_LOWIPL
+# define  PSL_IE	MIPS3_PSL_IE
 # define  PSL_USERSET	MIPS3_PSL_USERSET
 # define  USERMODE(ps)	MIPS3_USERMODE(ps)
 #endif /* mips3 only */
@@ -91,6 +100,7 @@
 
 #if !defined(MIPS3_PLUS) && defined(MIPS1) /* mips1 only */
 # define  PSL_LOWIPL	MIPS1_PSL_LOWIPL
+# define  PSL_IE	MIPS1_PSL_IE
 # define  PSL_USERSET	MIPS1_PSL_USERSET
 # define  USERMODE(ps)	MIPS1_USERMODE(ps)
 #endif /* mips1 only */
@@ -98,6 +108,7 @@
 
 #if  MIPS3_PLUS +  MIPS1 > 1
 # define PSL_LOWIPL	(CPUISMIPS3 ? MIPS3_PSL_LOWIPL : MIPS1_PSL_LOWIPL)
+# define PSL_IE		(CPUISMIPS3 ? MIPS3_PSL_IE : MIPS1_PSL_IE)
 # define PSL_USERSET	(CPUISMIPS3 ? MIPS3_PSL_USERSET : MIPS1_PSL_USERSET)
 # define USERMODE(ps)	(CPUISMIPS3 ? MIPS3_USERMODE(ps) : MIPS1_USERMODE(ps))
 #endif
Index: sys/arch/mips/mips/vm_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/mips/vm_machdep.c,v
retrieving revision 1.153
diff -u -p -r1.153 vm_machdep.c
--- sys/arch/mips/mips/vm_machdep.c	9 Aug 2016 16:38:24 -0000	1.153
+++ sys/arch/mips/mips/vm_machdep.c	10 Sep 2016 13:51:38 -0000
@@ -153,10 +174,10 @@ cpu_lwp_fork(struct lwp *l1, struct lwp 
 	KASSERT(tf->tf_regs[_R_SR] & MIPS_SR_KX);
 	KASSERT(pcb2->pcb_context.val[_L_SR] & MIPS_SR_KX);
 #endif
-	KASSERTMSG(pcb2->pcb_context.val[_L_SR] & MIPS_SR_INT_IE,
-	    "%d.%d %#"PRIxREGISTER,
+	KASSERTMSG(pcb2->pcb_context.val[_L_SR] & PSL_IE,
+	    "%d.%d %#"PRIxREGISTER "vs %#" PRIx32,
 	    l1->l_proc->p_pid, l1->l_lid,
-	    pcb2->pcb_context.val[_L_SR]);
+	    pcb2->pcb_context.val[_L_SR], PSL_IE);
 }
 
 /*