bus_dmamap_sync(tag, dmam, offset, len, ops)
              Performs pre- and post-DMA operation cache and/or buffer syn‐
              chronization.  Arguments are as follows:
              tag     This is the bus_dma_tag_t passed down from the parent
                      driver via <bus>_attach_args.
              dmam    The DMA mapping to be synchronized.
              offset  The offset into the DMA mapping to synchronize.
              len     The length of the mapping from offset to synchronize.
              ops     One or more synchronization operation to perform.  The
                      following DMA synchronization operations are defined:
                      BUS_DMASYNC_PREREAD    Perform any pre-read DMA cache
                                             and/or bounce operations. That
                                             is, any synchronization required
                                             prior to an update of host memory
                                             by the device.
                      BUS_DMASYNC_POSTREAD   Perform any post-read DMA cache
                                             and/or bounce operations. That
                                             is, any synchronization required
                                             after an update of host memory by
                                             the device and prior to CPU ac‐
                                             cess to host memory.
                      BUS_DMASYNC_PREWRITE   Perform any pre-write DMA cache
                                             and/or bounce operations. That
                                             is, any synchronization required
                                             after an update of host memory by
                                             the CPU and prior to device ac‐
                                             cess to host memory.
                      BUS_DMASYNC_POSTWRITE  Perform any post-write DMA cache
                                             and/or bounce operations. That
                                             is, any synchronization required
                                             after device access to host mem‐
                                             ory.