Index: sys/arch/arm/arm32/bus_dma.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/bus_dma.c,v
retrieving revision 1.116
diff -u -p -r1.116 bus_dma.c
--- sys/arch/arm/arm32/bus_dma.c	24 Aug 2019 11:51:26 -0000	1.116
+++ sys/arch/arm/arm32/bus_dma.c	14 Oct 2019 16:33:44 -0000
@@ -832,33 +832,30 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 	case BUS_DMASYNC_PREREAD: {
 		const size_t line_size = arm_dcache_align;
 		const size_t line_mask = arm_dcache_align_mask;
-		vsize_t misalignment = va & line_mask;
-		if (misalignment) {
-			va -= misalignment;
-			pa -= misalignment;
-			len += misalignment;
+
+		const vaddr_t preboundary = va & ~line_mask;
+		const vaddr_t firstboundary = (va + line_mask) & ~line_mask;
+		const vaddr_t lastboundary = (va + len) & ~line_mask;
+		const paddr_t pbpa = pa & ~line_mask;
+		const paddr_t fbpa = (pa + line_mask) & ~line_mask;
+		const paddr_t lbpa = (pa + len) & ~line_mask;
+
+		if (preboundary < va && preboundary < lastboundary) {
 			STAT_INCR(sync_preread_begin);
-			cpu_dcache_wbinv_range(va, line_size);
-			cpu_sdcache_wbinv_range(va, pa, line_size);
-			if (len <= line_size)
-				break;
-			va += line_size;
-			pa += line_size;
-			len -= line_size;
-		}
-		misalignment = len & line_mask;
-		len -= misalignment;
-		if (len > 0) {
+			cpu_dcache_wbinv_range(preboundary, line_size);
+			cpu_sdcache_wbinv_range(preboundary, pbpa, line_size);
+		}
+		if (firstboundary < lastboundary) {
+			const vsize_t invlen = lastboundary - firstboundary;
+
 			STAT_INCR(sync_preread);
-			cpu_dcache_inv_range(va, len);
-			cpu_sdcache_inv_range(va, pa, len);
+			cpu_dcache_inv_range(firstboundary, invlen);
+			cpu_sdcache_inv_range(firstboundary, fbpa, invlen);
 		}
-		if (misalignment) {
-			va += len;
-			pa += len;
+		if (lastboundary < va + len) {
 			STAT_INCR(sync_preread_tail);
-			cpu_dcache_wbinv_range(va, line_size);
-			cpu_sdcache_wbinv_range(va, pa, line_size);
+			cpu_dcache_wbinv_range(lastboundary, line_size);
+			cpu_sdcache_wbinv_range(lastboundary, lbpa, line_size);
 		}
 		break;
 	}
Index: sys/dev/ic/dwc_gmac.c
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/dwc_gmac.c,v
retrieving revision 1.65
diff -u -p -r1.65 dwc_gmac.c
--- sys/dev/ic/dwc_gmac.c	13 Sep 2019 07:55:06 -0000	1.65
+++ sys/dev/ic/dwc_gmac.c	14 Oct 2019 16:33:44 -0000
@@ -508,6 +508,10 @@ dwc_gmac_alloc_rx_ring(struct dwc_gmac_s
 			    "could not load rx buf DMA map #%d", i);
 			goto fail;
 		}
+
+		bus_dmamap_sync(sc->sc_dmat, data->rd_map, 0,
+		    data->rd_map->dm_mapsize, BUS_DMASYNC_PREREAD);
+
 		physaddr = data->rd_map->dm_segs[0].ds_addr;
 
 		desc = &sc->sc_rxq.r_desc[i];