Index: sys/arch/arm/arm32/arm32_kvminit.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/arm32_kvminit.c,v
retrieving revision 1.39
diff -u -p -r1.39 arm32_kvminit.c
--- sys/arch/arm/arm32/arm32_kvminit.c	1 Jul 2017 09:18:31 -0000	1.39
+++ sys/arch/arm/arm32/arm32_kvminit.c	6 Jul 2017 07:34:16 -0000
@@ -687,7 +687,7 @@ arm32_kernel_vm_init(vaddr_t kernel_vm_b
 	text.pv_pa = bmi->bmi_kernelstart;
 	text.pv_va = KERN_PHYSTOV(bmi, bmi->bmi_kernelstart);
 	text.pv_size = textsize;
-	text.pv_prot = VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE;
+	text.pv_prot = VM_PROT_READ | VM_PROT_EXECUTE;
 	text.pv_cache = PTE_CACHE;

 #ifdef VERBOSE_INIT_ARM
Index: sys/arch/arm/include/arm32/pmap.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/pmap.h,v
retrieving revision 1.148
diff -u -p -r1.148 pmap.h
--- sys/arch/arm/include/arm32/pmap.h	6 Jul 2017 06:31:24 -0000	1.148
+++ sys/arch/arm/include/arm32/pmap.h	6 Jul 2017 07:34:26 -0000
@@ -728,12 +728,12 @@ extern void (*pmap_zero_page_func)(paddr
  */
 #define	L1_S_PROT_U_generic	(L1_S_AP(AP_U))
 #define	L1_S_PROT_W_generic	(L1_S_AP(AP_W))
-#define	L1_S_PROT_RO_generic	(0)
+#define	L1_S_PROT_RO_generic	(L1_S_AP(AP_R))	/* AP_W == AP_R */
 #define	L1_S_PROT_MASK_generic	(L1_S_PROT_U|L1_S_PROT_W|L1_S_PROT_RO)

 #define	L1_S_PROT_U_xscale	(L1_S_AP(AP_U))
 #define	L1_S_PROT_W_xscale	(L1_S_AP(AP_W))
-#define	L1_S_PROT_RO_xscale	(0)
+#define	L1_S_PROT_RO_xscale	(L1_S_AP(AP_R))	/* AP_W == AP_R */
 #define	L1_S_PROT_MASK_xscale	(L1_S_PROT_U|L1_S_PROT_W|L1_S_PROT_RO)

 #define	L1_S_PROT_U_armv6	(L1_S_AP(AP_R) | L1_S_AP(AP_U))
@@ -754,12 +771,12 @@ extern void (*pmap_zero_page_func)(paddr

 #define	L2_L_PROT_U_generic	(L2_AP(AP_U))
 #define	L2_L_PROT_W_generic	(L2_AP(AP_W))
-#define	L2_L_PROT_RO_generic	(0)
+#define	L2_L_PROT_RO_generic	(L2_AP(AP_R))
 #define	L2_L_PROT_MASK_generic	(L2_L_PROT_U|L2_L_PROT_W|L2_L_PROT_RO)

 #define	L2_L_PROT_U_xscale	(L2_AP(AP_U))
 #define	L2_L_PROT_W_xscale	(L2_AP(AP_W))
-#define	L2_L_PROT_RO_xscale	(0)
+#define	L2_L_PROT_RO_xscale	(L2_AP(AP_R))
 #define	L2_L_PROT_MASK_xscale	(L2_L_PROT_U|L2_L_PROT_W|L2_L_PROT_RO)

 #define	L2_L_PROT_U_armv6n	(L2_AP0(AP_R) | L2_AP0(AP_U))
@@ -780,12 +797,12 @@ extern void (*pmap_zero_page_func)(paddr

 #define	L2_S_PROT_U_generic	(L2_AP(AP_U))
 #define	L2_S_PROT_W_generic	(L2_AP(AP_W))
-#define	L2_S_PROT_RO_generic	(0)
+#define	L2_S_PROT_RO_generic	(L2_AP(AP_R))
 #define	L2_S_PROT_MASK_generic	(L2_S_PROT_U|L2_S_PROT_W|L2_S_PROT_RO)

 #define	L2_S_PROT_U_xscale	(L2_AP0(AP_U))
 #define	L2_S_PROT_W_xscale	(L2_AP0(AP_W))
-#define	L2_S_PROT_RO_xscale	(0)
+#define	L2_S_PROT_RO_xscale	(L2_AP(AP_R))
 #define	L2_S_PROT_MASK_xscale	(L2_S_PROT_U|L2_S_PROT_W|L2_S_PROT_RO)

 #define	L2_S_PROT_U_armv6n	(L2_AP0(AP_R) | L2_AP0(AP_U))
@@ -924,8 +941,10 @@ extern void (*pmap_zero_page_func)(paddr
 #define	L2_L_CACHE_MASK		L2_L_CACHE_MASK_armv6n
 #define	L2_S_CACHE_MASK		L2_S_CACHE_MASK_armv6n

-/* These prototypes make writeable mappings, while the other MMU types
- * make read-only mappings. */
+/*
+ * These prototypes make writeable mappings, while the other MMU types
+ * make read-only mappings.
+ */
 #define	L1_SS_PROTO		L1_SS_PROTO_armv6
 #define	L1_S_PROTO		L1_S_PROTO_armv6
 #define	L1_C_PROTO		L1_C_PROTO_armv6
@@ -1007,8 +1026,10 @@ extern void (*pmap_zero_page_func)(paddr
 #define	L2_L_CACHE_MASK		L2_L_CACHE_MASK_armv7
 #define	L2_S_CACHE_MASK		L2_S_CACHE_MASK_armv7

-/* These prototypes make writeable mappings, while the other MMU types
- * make read-only mappings. */
+/*
+ * These prototypes make writeable mappings, while the other MMU types
+ * make read-only mappings.
+ */
 #define	L1_SS_PROTO		L1_SS_PROTO_armv7
 #define	L1_S_PROTO		L1_S_PROTO_armv7
 #define	L1_C_PROTO		L1_C_PROTO_armv7
@@ -1021,13 +1042,20 @@ extern void (*pmap_zero_page_func)(paddr
 /*
  * Macros to set and query the write permission on page descriptors.
  */
+/*
+ * Only used by DDB
+ */
 #define l1pte_set_writable(pte)	(((pte) & ~L1_S_PROT_RO) | L1_S_PROT_W)
 #define l1pte_set_readonly(pte)	(((pte) & ~L1_S_PROT_W) | L1_S_PROT_RO)
-#define l2pte_set_writable(pte)	(((pte) & ~L2_S_PROT_RO) | L2_S_PROT_W)
-#define l2pte_set_readonly(pte)	(((pte) & ~L2_S_PROT_W) | L2_S_PROT_RO)
+
+#define l2pte_set_writable(pte)	(L2_S_PROT_W == L2_S_PROT_RO ? \
+    ((pte) | L2_S_PROT_W) : (((pte) & ~L2_S_PROT_RO) | L2_S_PROT_W))
+
+#define l2pte_set_readonly(pte)	(L2_S_PROT_W == L2_S_PROT_RO ? \
+    ((pte) & ~L2_S_PROT_RO) : (((pte) & ~L2_S_PROT_W) | L2_S_PROT_RO))

 #define l2pte_writable_p(pte)	(((pte) & L2_S_PROT_W) == L2_S_PROT_W && \
-				 (L2_S_PROT_RO == 0 || \
+				 (L2_S_PROT_W == L2_S_PROT_RO || \
 				  ((pte) & L2_S_PROT_RO) != L2_S_PROT_RO))

 /*