Index: sys/arch/arm/arm/arm_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/arm_machdep.c,v
retrieving revision 1.51
diff -u -p -r1.51 arm_machdep.c
--- sys/arch/arm/arm/arm_machdep.c	4 Apr 2017 11:46:12 -0000	1.51
+++ sys/arch/arm/arm/arm_machdep.c	19 Jun 2017 19:19:47 -0000
@@ -108,6 +108,8 @@ char	machine_arch[] = MACHINE_ARCH;	/* f
 extern const uint32_t undefinedinstruction_bounce[];
 #endif
 
+__strong_alias(cpu_info_primary,cpu_info_store);
+
 /* Our exported CPU info; we can have only one. */
 struct cpu_info cpu_info_store = {
 	.ci_cpl = IPL_HIGH,
@@ -181,6 +183,7 @@ setregs(struct lwp *l, struct exec_packa
 	tf->tf_usr_sp = stack;
 	tf->tf_usr_lr = pack->ep_entry;
 	tf->tf_svc_lr = 0x77777777;		/* Something we can see */
+	tf->tf_svc_sp = (register_t)((tf + 1)) + (16*4);	/* standard  */
 	tf->tf_pc = pack->ep_entry;
 #ifdef __PROG32
 #if defined(__ARMEB__)
Index: sys/arch/arm/arm/syscall.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/syscall.c,v
retrieving revision 1.60
diff -u -p -r1.60 syscall.c
--- sys/arch/arm/arm/syscall.c	13 Aug 2014 21:41:32 -0000	1.60
+++ sys/arch/arm/arm/syscall.c	19 Jun 2017 19:19:47 -0000
@@ -155,7 +155,7 @@ swi_handler(trapframe_t *tf)
 #endif
 	}
 
-	lwp_settrapframe(l, tf);
+	//lwp_settrapframe(l, tf);
 
 #ifdef CPU_ARM7
 	/*
Index: sys/arch/arm/arm/undefined.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/undefined.c,v
retrieving revision 1.59
diff -u -p -r1.59 undefined.c
--- sys/arch/arm/arm/undefined.c	6 May 2017 13:05:59 -0000	1.59
+++ sys/arch/arm/arm/undefined.c	19 Jun 2017 19:19:47 -0000
@@ -420,7 +420,7 @@ undefinedinstruction(trapframe_t *tf)
 		 * time of fault.
 		 */
 		fault_code = FAULT_USER;
-		lwp_settrapframe(l, tf);
+		//lwp_settrapframe(l, tf);
 	} else
 		fault_code = 0;
 
Index: sys/arch/arm/arm32/arm32_boot.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/arm32_boot.c,v
retrieving revision 1.18
diff -u -p -r1.18 arm32_boot.c
--- sys/arch/arm/arm32/arm32_boot.c	22 Dec 2016 14:47:54 -0000	1.18
+++ sys/arch/arm/arm32/arm32_boot.c	19 Jun 2017 19:19:47 -0000
@@ -173,6 +173,24 @@ initarm_common(vaddr_t kvm_base, vsize_t
 	 */
 	uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
 
+	struct lwp * const l = &lwp0;
+	struct pcb * const pcb = lwp_getpcb(l);
+	struct trapframe * tf = (void *)(uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP - sizeof(*tf) - (16 *4));
+	pcb->pcb_ksp = (vaddr_t)tf;
+	lwp_settrapframe(l, tf);
+
+	/*
+	 * Now zero out the only two areas of the uarea that we care about.
+	 */
+	memset(l->l_md.md_tf, 0, sizeof(*l->l_md.md_tf));
+ 	memset(pcb, 0, sizeof(*pcb));
+
+#if defined(__ARMEB__)
+        tf->tf_spsr = PSR_SVC32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
+#else
+        tf->tf_spsr = PSR_SVC32_MODE;
+#endif
+
 #ifdef VERBOSE_INIT_ARM
 	printf("bootstrap done.\n");
 #endif
@@ -313,7 +331,7 @@ initarm_common(vaddr_t kvm_base, vsize_t
 #endif
 
 	/* We return the new stack pointer address */
-	return kernelstack.pv_va + USPACE_SVC_STACK_TOP;
+	return (vaddr_t)tf;
 }
 
 #ifdef MULTIPROCESSOR
Index: sys/arch/arm/arm32/arm32_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/arm32_machdep.c,v
retrieving revision 1.112
diff -u -p -r1.112 arm32_machdep.c
--- sys/arch/arm/arm32/arm32_machdep.c	16 Jul 2016 01:49:42 -0000	1.112
+++ sys/arch/arm/arm32/arm32_machdep.c	19 Jun 2017 19:19:47 -0000
@@ -315,10 +315,19 @@ cpu_startup(void)
 	format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
 	printf("avail memory = %s\n", pbuf);
 
+#if 0
 	struct lwp * const l = &lwp0;
 	struct pcb * const pcb = lwp_getpcb(l);
-	pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP;
-	lwp_settrapframe(l, (struct trapframe *)pcb->pcb_ksp - 1);
+	struct trapframe * tf = (void *)(uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP - sizeof(*tf) - (16 *4));
+	pcb->pcb_ksp = (vaddr_t)tf;
+	lwp_settrapframe(l, tf);
+
+#if defined(__ARMEB__)
+	tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
+#else
+ 	tf->tf_spsr = PSR_USR32_MODE;
+#endif
+#endif
 }
 
 /*
Index: sys/arch/arm/arm32/fault.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/fault.c,v
retrieving revision 1.103
diff -u -p -r1.103 fault.c
--- sys/arch/arm/arm32/fault.c	2 Mar 2015 13:36:36 -0000	1.103
+++ sys/arch/arm/arm32/fault.c	19 Jun 2017 19:19:47 -0000
@@ -311,7 +311,7 @@ data_abort_handler(trapframe_t *tf)
 	}
 
 	if (user) {
-		lwp_settrapframe(l, tf);
+		//lwp_settrapframe(l, tf);
 	}
 
 	/*
@@ -624,7 +624,7 @@ dab_align(trapframe_t *tf, u_int fsr, u_
 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
 	ksi->ksi_trap = fsr;
 
-	lwp_settrapframe(l, tf);
+	//lwp_settrapframe(l, tf);
 
 	return (1);
 }
@@ -731,7 +731,7 @@ dab_buserr(trapframe_t *tf, u_int fsr, u
 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
 	ksi->ksi_trap = fsr;
 
-	lwp_settrapframe(l, tf);
+	//lwp_settrapframe(l, tf);
 
 	return (1);
 }
@@ -834,7 +834,7 @@ prefetch_abort_handler(trapframe_t *tf)
 		ksi.ksi_signo = SIGILL;
 		ksi.ksi_code = ILL_ILLOPC;
 		ksi.ksi_addr = (uint32_t *)(intptr_t) tf->tf_pc;
-		lwp_settrapframe(l, tf);
+		//lwp_settrapframe(l, tf);
 		goto do_trapsignal;
 	default:
 		break;
@@ -846,7 +846,7 @@ prefetch_abort_handler(trapframe_t *tf)
 
 	/* Get fault address */
 	fault_pc = tf->tf_pc;
-	lwp_settrapframe(l, tf);
+	//lwp_settrapframe(l, tf);
 	UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, tf=0x%x)",
 	    fault_pc, l, tf, 0);
 
Index: sys/arch/arm/arm32/vm_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/vm_machdep.c,v
retrieving revision 1.70
diff -u -p -r1.70 vm_machdep.c
--- sys/arch/arm/arm32/vm_machdep.c	29 Mar 2015 09:47:48 -0000	1.70
+++ sys/arch/arm/arm32/vm_machdep.c	19 Jun 2017 19:19:48 -0000
@@ -159,10 +159,17 @@ cpu_lwp_fork(struct lwp *l1, struct lwp 
 	}
 #endif	/* PMAP_DEBUG */
 
-	struct trapframe *tf = (struct trapframe *)pcb2->pcb_ksp - 1;
+	struct trapframe *tf = (void *)(pcb2->pcb_ksp - sizeof(*tf) - 4 * 16);
 	lwp_settrapframe(l2, tf);
 	*tf = *lwp_trapframe(l1);
 
+#if 0
+#if defined(__PROG32) 
+        KASSERTMSG(VALID_R15_PSR(lwp_trapframe(l2)->tf_pc, lwp_trapframe(l2)->tf_spsr),
+            "lwp %p tf %p", l2, lwp_trapframe(l2));
+#endif
+#endif
+
 	/*
 	 * If specified, give the child a different stack (make sure
 	 * it's 8-byte aligned).
@@ -173,7 +180,8 @@ cpu_lwp_fork(struct lwp *l1, struct lwp 
 	sf = (struct switchframe *)tf - 1;
 	sf->sf_r4 = (u_int)func;
 	sf->sf_r5 = (u_int)arg;
-	sf->sf_r7 = PSR_USR32_MODE;		/* for returning to userspace */
+	sf->sf_r6 = 0; /* cpu_switchto will pop this */
+	sf->sf_r7 = PSR_SVC32_MODE;		/* we're not userland yet... */
 	sf->sf_sp = (u_int)tf;
 	sf->sf_pc = (u_int)lwp_trampoline;
 	pcb2->pcb_ksp = (u_int)sf;
Index: sys/arch/arm/include/arm32/frame.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/frame.h,v
retrieving revision 1.42
diff -u -p -r1.42 frame.h
--- sys/arch/arm/include/arm32/frame.h	17 Apr 2015 17:28:33 -0000	1.42
+++ sys/arch/arm/include/arm32/frame.h	19 Jun 2017 19:19:48 -0000
@@ -333,6 +333,7 @@ LOCK_CAS_DEBUG_LOCALS
 #endif
 
 #define PUSHFRAME							   \
+	sub	sp, sp, #(16 * 4);	/* chuq's space */		   \
 	str	lr, [sp, #-4]!;		/* Push the return address */	   \
 	sub	sp, sp, #(TF_PC-TF_R0);	/* Adjust the stack pointer */	   \
 	PUSHUSERREGS;			/* Push the user mode registers */ \
@@ -401,7 +402,8 @@ LOCK_CAS_DEBUG_LOCALS
 	ldmia   sp, {r0-r14}^;		/* Restore registers (usr mode) */ \
 	mov     r0, r0;                 /* NOP for previous instruction */ \
 	add	sp, sp, #(TF_PC-TF_R0);	/* Adjust the stack pointer */	   \
- 	ldr	lr, [sp], #0x0004	/* Pop the return address */
+ 	ldr	lr, [sp], #0x0004;	/* Pop the return address */	   \
+	add	sp, sp, #(16 * 4);	/* chuq's space */
 
 #define PULLIDLEFRAME							   \
 	add	sp, sp, #TF_R4;		/* Adjust the stack pointer */	   \
@@ -447,6 +449,8 @@ LOCK_CAS_DEBUG_LOCALS
 	mrs	r3, spsr;		/* Save xxx32 spsr */		   \
 	SET_CPSR_MODE(r2, PSR_SVC32_MODE);				   \
 	bic	r2, sp, #7;		/* Align new SVC sp */		   \
+	sub	r2, r2, #(4 * 16);	/* Leave room for dtrace */	   \
+					/*   to emulate push */		   \
 	str	r0, [r2, #-4]!;		/* Push return address */	   \
 	stmdb	r2!, {sp, lr};		/* Push SVC sp, lr */		   \
 	mov	sp, r2;			/* Keep stack aligned */	   \