? doc/TODO.ptrace Index: distrib/sets/lists/comp/md.amd64 =================================================================== RCS file: /cvsroot/src/distrib/sets/lists/comp/md.amd64,v retrieving revision 1.238 diff -u -r1.238 md.amd64 --- distrib/sets/lists/comp/md.amd64 26 Oct 2016 21:24:20 -0000 1.238 +++ distrib/sets/lists/comp/md.amd64 12 Dec 2016 23:34:07 -0000 @@ -496,6 +496,7 @@ ./usr/include/x86/cpu_ucode.h comp-c-include ./usr/include/x86/cputypes.h comp-c-include ./usr/include/x86/cpuvar.h comp-c-include +./usr/include/x86/dbregs.h comp-c-include ./usr/include/x86/float.h comp-c-include ./usr/include/x86/fpu.h comp-c-include ./usr/include/x86/ieee.h comp-c-include Index: distrib/sets/lists/comp/md.i386 =================================================================== RCS file: /cvsroot/src/distrib/sets/lists/comp/md.i386,v retrieving revision 1.159 diff -u -r1.159 md.i386 --- distrib/sets/lists/comp/md.i386 15 Oct 2016 11:34:30 -0000 1.159 +++ distrib/sets/lists/comp/md.i386 12 Dec 2016 23:34:07 -0000 @@ -370,6 +370,7 @@ ./usr/include/x86/cpu_ucode.h comp-c-include ./usr/include/x86/cputypes.h comp-c-include ./usr/include/x86/cpuvar.h comp-c-include +./usr/include/x86/dbregs.h comp-c-include ./usr/include/x86/float.h comp-c-include ./usr/include/x86/fpu.h comp-c-include ./usr/include/x86/ieee.h comp-c-include Index: sys/arch/amd64/amd64/machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/amd64/machdep.c,v retrieving revision 1.237 diff -u -r1.237 machdep.c --- sys/arch/amd64/amd64/machdep.c 12 Dec 2016 02:51:24 -0000 1.237 +++ sys/arch/amd64/amd64/machdep.c 12 Dec 2016 23:35:48 -0000 @@ -482,6 +482,7 @@ pmap_kernel()->pm_ldt_sel = GSYSSEL(GLDT_SEL, SEL_KPL); pcb->pcb_cr0 = rcr0() & ~CR0_TS; l->l_md.md_regs = (struct trapframe *)pcb->pcb_rsp0 - 1; + memset(l->l_md.md_watchpoint, 0, sizeof(*l->l_md.md_watchpoint)); #if !defined(XEN) lldt(pmap_kernel()->pm_ldt_sel); @@ -1316,6 +1317,8 @@ l->l_proc->p_flag &= ~PK_32; + memset(l->l_md.md_watchpoint, 0, sizeof(*l->l_md.md_watchpoint)); + tf = l->l_md.md_regs; tf->tf_ds = LSEL(LUDATA_SEL, SEL_UPL); tf->tf_es = LSEL(LUDATA_SEL, SEL_UPL); Index: sys/arch/amd64/amd64/netbsd32_machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/amd64/netbsd32_machdep.c,v retrieving revision 1.97 diff -u -r1.97 netbsd32_machdep.c --- sys/arch/amd64/amd64/netbsd32_machdep.c 19 Oct 2016 09:44:00 -0000 1.97 +++ sys/arch/amd64/amd64/netbsd32_machdep.c 12 Dec 2016 23:35:48 -0000 @@ -129,6 +129,8 @@ p->p_flag |= PK_32; + memset(l->l_md.md_watchpoint, 0, sizeof(*l->l_md.md_watchpoint)); + tf = l->l_md.md_regs; tf->tf_ds = LSEL(LUDATA32_SEL, SEL_UPL); tf->tf_es = LSEL(LUDATA32_SEL, SEL_UPL); Index: sys/arch/amd64/amd64/process_machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/amd64/process_machdep.c,v retrieving revision 1.29 diff -u -r1.29 process_machdep.c --- sys/arch/amd64/amd64/process_machdep.c 15 Feb 2014 22:20:41 -0000 1.29 +++ sys/arch/amd64/amd64/process_machdep.c 12 Dec 2016 23:35:48 -0000 @@ -49,6 +49,16 @@ * * process_set_pc(proc) * Set the process's program counter. + * + * process_count_watchpoints(proc, retval) + * Return the number of supported hardware watchpoints. + * + * process_read_watchpoint(proc, watchpoint) + * Read hardware watchpoint of the given index. + * + * process_write_watchpoint(proc, watchpoint) + * Write hardware watchpoint of the given index. + * */ @@ -66,6 +76,7 @@ #include #include #include +#include #include static inline struct trapframe *process_frame(struct lwp *); @@ -157,3 +168,81 @@ return (0); } + +int +process_count_watchpoints(struct lwp *l, register_t *retval) +{ + + *retval = X86_HW_WATCHPOINTS; + + return (0); +} + +int +process_read_watchpoint(struct lwp *l, struct ptrace_watchpoint *pw) +{ + + pw->pw_md.md_address = + (void*)(intptr_t)l->l_md.md_watchpoint[pw->pw_index].address; + pw->pw_md.md_condition = l->l_md.md_watchpoint[pw->pw_index].condition; + pw->pw_md.md_length = l->l_md.md_watchpoint[pw->pw_index].length; + + return (0); +} + +static void +update_mdl_x86_hw_watchpoints(struct lwp *l) +{ + size_t i; + + for (i = 0; i < X86_HW_WATCHPOINTS; i++) { + if (l->l_md.md_watchpoint[0].address != 0) { + return; + } + } + l->l_md.md_flags &= ~MDL_X86_HW_WATCHPOINTS; +} + +int +process_write_watchpoint(struct lwp *l, struct ptrace_watchpoint *pw) +{ + + if (pw->pw_index > X86_HW_WATCHPOINTS) + return (EINVAL); + + if (pw->pw_md.md_address == 0) { + l->l_md.md_watchpoint[pw->pw_index].address = 0; + update_mdl_x86_hw_watchpoints(l); + return (0); + } + + if ((vaddr_t)pw->pw_md.md_address > VM_MAXUSER_ADDRESS) + return (EINVAL); + + switch (pw->pw_md.md_condition) { + case X86_HW_WATCHPOINT_DR7_CONDITION_EXECUTION: + case X86_HW_WATCHPOINT_DR7_CONDITION_DATA_WRITE: + case X86_HW_WATCHPOINT_DR7_CONDITION_DATA_READWRITE: + break; + default: + return (EINVAL); + } + + switch (pw->pw_md.md_length) { + case X86_HW_WATCHPOINT_DR7_LENGTH_BYTE: + case X86_HW_WATCHPOINT_DR7_LENGTH_TWOBYTES: + case X86_HW_WATCHPOINT_DR7_LENGTH_FOURBYTES: + break; + default: + return (EINVAL); + } + + l->l_md.md_watchpoint[pw->pw_index].address = + (vaddr_t)pw->pw_md.md_address; + l->l_md.md_watchpoint[pw->pw_index].condition = pw->pw_md.md_condition; + l->l_md.md_watchpoint[pw->pw_index].length = pw->pw_md.md_length; + + l->l_md.md_flags |= MDL_X86_HW_WATCHPOINTS; + + return (0); +} Index: sys/arch/amd64/amd64/trap.c =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/amd64/trap.c,v retrieving revision 1.87 diff -u -r1.87 trap.c --- sys/arch/amd64/amd64/trap.c 26 Oct 2016 22:02:14 -0000 1.87 +++ sys/arch/amd64/amd64/trap.c 12 Dec 2016 23:35:48 -0000 @@ -673,6 +673,19 @@ } case T_TRCTRAP: + /* + * Ignore debug register trace traps due to + * accesses in the user's address space, which + * can happen under several conditions such as + * if a user sets a watchpoint on a buffer and + * then passes that buffer to a system call. + * We still want to get TRCTRAPS for addresses + * in kernel space because that is useful when + * debugging the kernel. + */ + if (user_trap_x86_hw_watchpoint()) + break; + /* Check whether they single-stepped into a lcall. */ if (frame->tf_rip == (uint64_t)IDTVEC(oosyscall) || frame->tf_rip == (uint64_t)IDTVEC(osyscall) || Index: sys/arch/amd64/conf/files.amd64 =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/conf/files.amd64,v retrieving revision 1.87 diff -u -r1.87 files.amd64 --- sys/arch/amd64/conf/files.amd64 6 Sep 2015 07:17:14 -0000 1.87 +++ sys/arch/amd64/conf/files.amd64 12 Dec 2016 23:35:48 -0000 @@ -49,6 +49,7 @@ file arch/amd64/amd64/process_machdep.c machdep file arch/amd64/amd64/trap.c machdep file arch/x86/x86/fpu.c machdep +file arch/x86/x86/dbregs.c machdep file arch/x86/x86/convert_xmm_s87.c machdep file arch/amd64/amd64/lock_stubs.S machdep file dev/cons.c machdep Index: sys/arch/amd64/include/proc.h =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/include/proc.h,v retrieving revision 1.19 diff -u -r1.19 proc.h --- sys/arch/amd64/include/proc.h 20 Feb 2014 18:19:10 -0000 1.19 +++ sys/arch/amd64/include/proc.h 12 Dec 2016 23:35:48 -0000 @@ -38,6 +38,7 @@ #include #include +#include /* * Machine-dependent part of the lwp structure for amd64. @@ -51,10 +52,12 @@ struct vm_page *md_gc_ptp; /* pages from pmap g/c */ int md_flags; /* machine-dependent flags */ volatile int md_astpending; + struct x86_hw_watchpoint md_watchpoint[X86_HW_WATCHPOINTS]; }; -#define MDL_COMPAT32 0x0008 /* i386, always return via iret */ -#define MDL_IRET 0x0010 /* force return via iret, not sysret */ +#define MDL_COMPAT32 0x0008 /* i386, always return via iret */ +#define MDL_IRET 0x0010 /* force return via iret, not sysret */ +#define MDL_X86_HW_WATCHPOINTS 0x0020 /* has hardware watchpoints */ struct mdproc { int md_flags; Index: sys/arch/amd64/include/ptrace.h =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/include/ptrace.h,v retrieving revision 1.7 diff -u -r1.7 ptrace.h --- sys/arch/amd64/include/ptrace.h 19 Oct 2016 09:44:00 -0000 1.7 +++ sys/arch/amd64/include/ptrace.h 12 Dec 2016 23:35:48 -0000 @@ -36,18 +36,24 @@ /* * i386-dependent ptrace definitions */ -#define PT_STEP (PT_FIRSTMACH + 0) -#define PT_GETREGS (PT_FIRSTMACH + 1) -#define PT_SETREGS (PT_FIRSTMACH + 2) -#define PT_GETFPREGS (PT_FIRSTMACH + 3) -#define PT_SETFPREGS (PT_FIRSTMACH + 4) +#define PT_STEP (PT_FIRSTMACH + 0) +#define PT_GETREGS (PT_FIRSTMACH + 1) +#define PT_SETREGS (PT_FIRSTMACH + 2) +#define PT_GETFPREGS (PT_FIRSTMACH + 3) +#define PT_SETFPREGS (PT_FIRSTMACH + 4) +#define PT_READ_WATCHPOINT (PT_FIRSTMACH + 5) +#define PT_WRITE_WATCHPOINT (PT_FIRSTMACH + 6) +#define PT_COUNT_WATCHPOINTS (PT_FIRSTMACH + 7) #define PT_MACHDEP_STRINGS \ "PT_STEP", \ "PT_GETREGS", \ "PT_SETREGS", \ "PT_GETFPREGS", \ - "PT_SETFPREGS", + "PT_SETFPREGS", \ + "PT_READ_WATCHPOINT", \ + "PT_WRITE_WATCHPOINT", \ + "PT_COUNT_WATCHPOINTS" #include #define PTRACE_REG_PC(r) (r)->regs[_REG_RIP] @@ -59,6 +65,34 @@ #define PTRACE_BREAKPOINT_SIZE 1 #define PTRACE_BREAKPOINT_ADJ 1 +#define __HAVE_PTRACE_WATCHPOINTS + +/* + * This MD structure translates into x86_hw_watchpoint + * + * pw_address - 0 represents disabled hardware watchpoint + * + * conditions: + * 0b00 - execution + * 0b01 - data write + * 0b10 - io read/write (not implemented) + * 0b11 - data read/write + * + * length: + * 0b00 - 1 byte + * 0b01 - 2 bytes + * 0b10 - undefined (8 bytes in modern CPUs - not implemented) + * 0b11 - 4 bytes + * + * Helper symbols for conditions and length are available in + * + */ +struct mdpw { + void *md_address; + int md_condition; + int md_length; +}; + #ifdef _KERNEL_OPT #include "opt_compat_netbsd32.h" @@ -71,8 +105,13 @@ #define process_write_regs32 netbsd32_process_write_regs #define process_write_fpregs32 netbsd32_process_write_fpregs +#define process_write_watchpoint32 netbsd32_process_write_watchpoint +#define process_read_watchpoint32 netbsd32_process_read_watchpoint +#define process_count_watchpoint32 netbsd32_process_count_watchpoint + #define process_reg32 struct reg32 #define process_fpreg32 struct fpreg32 +#define process_watchpoint32 struct ptrace_watchpoint32 #endif /* COMPAT_NETBSD32 */ #endif /* _KERNEL_OPT */ Index: sys/arch/amd64/include/userret.h =================================================================== RCS file: /cvsroot/src/sys/arch/amd64/include/userret.h,v retrieving revision 1.9 diff -u -r1.9 userret.h --- sys/arch/amd64/include/userret.h 28 Apr 2008 20:23:12 -0000 1.9 +++ sys/arch/amd64/include/userret.h 12 Dec 2016 23:35:48 -0000 @@ -67,6 +67,7 @@ */ #include +#include static __inline void userret(struct lwp *); @@ -80,4 +81,15 @@ /* Invoke MI userret code */ mi_userret(l); + + /* + * Never mix debug registers with single step, while technically + * possible on x86 CPUs, it adds unnecessary complications we do + * not want to handle it. + */ + if ((l->l_md.md_regs->tf_rflags & PSL_T) == 0 && + l->l_md.md_flags & MDL_X86_HW_WATCHPOINTS) + set_x86_hw_watchpoints(l); + else + clear_x86_hw_watchpoints(); } Index: sys/arch/i386/i386/machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/i386/i386/machdep.c,v retrieving revision 1.766 diff -u -r1.766 machdep.c --- sys/arch/i386/i386/machdep.c 11 Dec 2016 22:38:50 -0000 1.766 +++ sys/arch/i386/i386/machdep.c 12 Dec 2016 23:35:52 -0000 @@ -513,6 +513,7 @@ l->l_md.md_regs = (struct trapframe *)pcb->pcb_esp0 - 1; memcpy(&pcb->pcb_fsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_fsd)); memcpy(&pcb->pcb_gsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_gsd)); + memset(l->l_md.md_watchpoint, 0, sizeof(*l->l_md.md_watchpoint)); #ifndef XEN lldt(pmap_kernel()->pm_ldt_sel); @@ -846,6 +847,8 @@ memcpy(&pcb->pcb_fsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_fsd)); memcpy(&pcb->pcb_gsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_gsd)); + memset(l->l_md.md_watchpoint, 0, sizeof(*l->l_md.md_watchpoint)); + tf = l->l_md.md_regs; tf->tf_gs = GSEL(GUGS_SEL, SEL_UPL); tf->tf_fs = GSEL(GUFS_SEL, SEL_UPL); Index: sys/arch/i386/i386/process_machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/i386/i386/process_machdep.c,v retrieving revision 1.86 diff -u -r1.86 process_machdep.c --- sys/arch/i386/i386/process_machdep.c 2 Nov 2016 00:11:59 -0000 1.86 +++ sys/arch/i386/i386/process_machdep.c 12 Dec 2016 23:35:55 -0000 @@ -49,6 +49,16 @@ * * process_set_pc(proc) * Set the process's program counter. + * + * process_count_watchpoints(proc, retval) + * Return the number of supported hardware watchpoints. + * + * process_read_watchpoint(proc, watchpoint) + * Read hardware watchpoint of the given index. + * + * process_write_watchpoint(proc, watchpoint) + * Write hardware watchpoint of the given index. + * */ #include @@ -71,6 +81,7 @@ #include #include +#include #include #ifdef VM86 @@ -337,3 +348,81 @@ } #endif /* __HAVE_PTRACE_MACHDEP */ #endif /* PTRACE_HOOKS */ + +int +process_count_watchpoints(struct lwp *l) +{ + + *retval = X86_HW_WATCHPOINTS; + + return (0); +} + +int +process_read_watchpoint(struct lwp *l, struct ptrace_watchpoint *pw) +{ + + pw->pw_md.md_address = + (void*)(intptr_t)l->l_md.md_watchpoint[pw->pw_index].address; + pw->pw_md.md_condition = l->l_md.md_watchpoint[pw->pw_index].condition; + pw->pw_md.md_length = l->l_md.md_watchpoint[pw->pw_index].length; + + return (0); +} + +static void +update_mdl_x86_hw_watchpoints(struct lwp *l) +{ + size_t i; + + for (i = 0; i < X86_HW_WATCHPOINTS; i++) { + if (l->l_md.md_watchpoint[0].address != 0) { + return; + } + } + l->l_md.md_flags &= ~MDL_X86_HW_WATCHPOINTS; +} + +int +process_write_watchpoint(struct lwp *l, struct ptrace_watchpoint *pw) +{ + + if (pw->pw_index > X86_HW_WATCHPOINTS) + return (EINVAL); + + if (pw->pw_md.md_address == 0) { + l->l_md.md_watchpoint[pw->pw_index].address = 0; + update_mdl_x86_hw_watchpoints(l); + return (0); + } + + if ((vaddr_t)pw->pw_md.md_address > VM_MAXUSER_ADDRESS) + return (EINVAL); + + switch (pw->pw_md.md_condition) { + case X86_HW_WATCHPOINT_DR7_CONDITION_EXECUTION: + case X86_HW_WATCHPOINT_DR7_CONDITION_DATA_WRITE: + case X86_HW_WATCHPOINT_DR7_CONDITION_DATA_READWRITE: + break; + default: + return (EINVAL); + } + + switch (pw->pw_md.md_length) { + case X86_HW_WATCHPOINT_DR7_LENGTH_BYTE: + case X86_HW_WATCHPOINT_DR7_LENGTH_TWOBYTES: + case X86_HW_WATCHPOINT_DR7_LENGTH_FOURBYTES: + break; + default: + return (EINVAL); + } + + l->l_md.md_watchpoint[pw->pw_index].address = + (vaddr_t)pw->pw_md.md_address; + l->l_md.md_watchpoint[pw->pw_index].condition = pw->pw_md.md_condition; + l->l_md.md_watchpoint[pw->pw_index].length = pw->pw_md.md_length; + + l->l_md.md_flags |= MDL_X86_HW_WATCHPOINTS; + + return (0); +} Index: sys/arch/i386/include/proc.h =================================================================== RCS file: /cvsroot/src/sys/arch/i386/include/proc.h,v retrieving revision 1.42 diff -u -r1.42 proc.h --- sys/arch/i386/include/proc.h 20 Feb 2014 18:19:10 -0000 1.42 +++ sys/arch/i386/include/proc.h 12 Dec 2016 23:35:55 -0000 @@ -36,6 +36,7 @@ #include #include +#include /* * Machine-dependent part of the lwp structure for i386. @@ -49,10 +50,12 @@ volatile int md_astpending; /* AST pending for this process */ struct pmap *md_gc_pmap; /* pmap being garbage collected */ struct vm_page *md_gc_ptp; /* pages from pmap g/c */ + struct x86_hw_watchpoint md_watchpoint[X86_HW_WATCHPOINTS]; }; /* md_flags */ -#define MDL_IOPL 0x0002 /* XEN: i/o privilege */ +#define MDL_IOPL 0x0002 /* XEN: i/o privilege */ +#define MDL_X86_HW_WATCHPOINTS 0x0004 /* has hardware watchpoints */ struct mdproc { int md_flags; Index: sys/arch/i386/include/ptrace.h =================================================================== RCS file: /cvsroot/src/sys/arch/i386/include/ptrace.h,v retrieving revision 1.15 diff -u -r1.15 ptrace.h --- sys/arch/i386/include/ptrace.h 25 Sep 2015 16:05:17 -0000 1.15 +++ sys/arch/i386/include/ptrace.h 12 Dec 2016 23:35:55 -0000 @@ -84,8 +84,11 @@ #define __HAVE_PROCFS_MACHDEP /* The machine-dependent ptrace(2) requests. */ -#define PT_GETXMMREGS (PT_FIRSTMACH + 5) -#define PT_SETXMMREGS (PT_FIRSTMACH + 6) +#define PT_GETXMMREGS (PT_FIRSTMACH + 5) +#define PT_SETXMMREGS (PT_FIRSTMACH + 6) +#define PT_READ_WATCHPOINT (PT_FIRSTMACH + 7) +#define PT_WRITE_WATCHPOINT (PT_FIRSTMACH + 8) +#define PT_COUNT_WATCHPOINTS (PT_FIRSTMACH + 9) #define PT_MACHDEP_STRINGS \ "PT_STEP", \ @@ -94,7 +97,10 @@ "PT_GETFPREGS", \ "PT_SETFPREGS", \ "PT_GETXMMREGS", \ - "PT_SETXMMREGS", + "PT_SETXMMREGS", \ + "PT_READ_WATCHPOINT", \ + "PT_WRITE_WATCHPOINT", \ + "PT_COUNT_WATCHPOINTS" #include #define PTRACE_REG_PC(r) (r)->r_eip @@ -106,6 +112,34 @@ #define PTRACE_BREAKPOINT_SIZE 1 #define PTRACE_BREAKPOINT_ADJ sizeof(PTRACE_BREAKPOINT) +#define __HAVE_PTRACE_WATCHPOINTS + +/* + * This MD structure translates into x86_hw_watchpoint + * + * pw_address - 0 represents disabled hardware watchpoint + * + * conditions: + * 0b00 - execution + * 0b01 - data write + * 0b10 - io read/write (not implemented) + * 0b11 - data read/write + * + * length: + * 0b00 - 1 byte + * 0b01 - 2 bytes + * 0b10 - undefined + * 0b11 - 4 bytes + * + * Helper symbols for conditions and length are available in + * + */ +struct mdpw { + void *md_address; + int md_condition; + int md_length; +}; + #ifdef _KERNEL /* Index: sys/arch/i386/include/userret.h =================================================================== RCS file: /cvsroot/src/sys/arch/i386/include/userret.h,v retrieving revision 1.11 diff -u -r1.11 userret.h --- sys/arch/i386/include/userret.h 28 Apr 2008 20:23:24 -0000 1.11 +++ sys/arch/i386/include/userret.h 12 Dec 2016 23:35:55 -0000 @@ -63,6 +63,7 @@ */ #include +#include static __inline void userret(struct lwp *); @@ -76,4 +77,15 @@ /* Invoke MI userret code */ mi_userret(l); + + /* + * Never mix debug registers with single step, while technically + * possible on x86 CPUs, it adds unnecessary complications we do + * not want to handle it. + */ + if ((l->l_md.md_regs->tf_eflags & PSL_T) == 0 && + l->l_md.md_flags & MDL_X86_HW_WATCHPOINTS) + set_x86_hw_watchpoints(l); + else + clear_x86_hw_watchpoints(); } Index: sys/arch/x86/include/Makefile =================================================================== RCS file: /cvsroot/src/sys/arch/x86/include/Makefile,v retrieving revision 1.20 diff -u -r1.20 Makefile --- sys/arch/x86/include/Makefile 27 Feb 2016 00:09:45 -0000 1.20 +++ sys/arch/x86/include/Makefile 12 Dec 2016 23:35:58 -0000 @@ -11,6 +11,7 @@ cpu_ucode.h \ cputypes.h \ cpuvar.h \ + dbregs.h \ float.h \ fpu.h \ ieee.h ieeefp.h \ Index: sys/arch/x86/include/dbregs.h =================================================================== RCS file: /cvsroot/src/sys/arch/x86/include/dbregs.h,v retrieving revision 1.1 diff -u -r1.1 dbregs.h --- sys/arch/x86/include/dbregs.h 27 Nov 2016 14:49:21 -0000 1.1 +++ sys/arch/x86/include/dbregs.h 12 Dec 2016 23:35:58 -0000 @@ -30,16 +30,115 @@ #ifndef _X86_DBREGS_H_ #define _X86_DBREGS_H_ -#ifdef _KERNEL +#if defined(_KMEMUSER) || defined(_KERNEL) -struct lwp; -struct dbreg; +#include +#include -void reset_dbregs(void); +/* + * CPU Debug Status Register (DR6) + * + * Reserved bits: 4-12 and on x86_64 32-64 + */ +#define X86_HW_WATCHPOINT_DR6_DR0_BREAKPOINT_CONDITION_DETECTED __BIT(0) +#define X86_HW_WATCHPOINT_DR6_DR1_BREAKPOINT_CONDITION_DETECTED __BIT(1) +#define X86_HW_WATCHPOINT_DR6_DR2_BREAKPOINT_CONDITION_DETECTED __BIT(2) +#define X86_HW_WATCHPOINT_DR6_DR3_BREAKPOINT_CONDITION_DETECTED __BIT(3) +#define X86_HW_WATCHPOINT_DR6_DEBUG_REGISTER_ACCESS_DETECTED __BIT(13) +#define X86_HW_WATCHPOINT_DR6_SINGLE_STEP __BIT(14) +#define X86_HW_WATCHPOINT_DR6_TASK_SWITCH __BIT(15) -int process_write_dbregs(struct lwp *lwp, const struct dbreg *regs); -int process_read_dbregs(struct lwp *lwp, struct dbreg *regs); +/* + * CPU Debug Control Register (DR7) + * + * LOCAL_EXACT_BREAKPOINT and GLOBAL_EXACT_BREAKPOINT are no longer used since + * the P6 processor family - portable code should set these bits + * unconditionally in oder to get exact breakpoints + * + * Reserved bits: 10, 12, 14-15 and on x86_64 32-64 + */ +#define X86_HW_WATCHPOINT_DR7_LOCAL_DR0_BREAKPOINT __BIT(0) +#define X86_HW_WATCHPOINT_DR7_GLOBAL_DR0_BREAKPOINT __BIT(1) +#define X86_HW_WATCHPOINT_DR7_LOCAL_DR1_BREAKPOINT __BIT(2) +#define X86_HW_WATCHPOINT_DR7_GLOBAL_DR1_BREAKPOINT __BIT(3) +#define X86_HW_WATCHPOINT_DR7_LOCAL_DR2_BREAKPOINT __BIT(4) +#define X86_HW_WATCHPOINT_DR7_GLOBAL_DR2_BREAKPOINT __BIT(5) +#define X86_HW_WATCHPOINT_DR7_LOCAL_DR3_BREAKPOINT __BIT(6) +#define X86_HW_WATCHPOINT_DR7_GLOBAL_DR3_BREAKPOINT __BIT(7) +#define X86_HW_WATCHPOINT_DR7_LOCAL_EXACT_BREAKPOINT __BIT(8) +#define X86_HW_WATCHPOINT_DR7_GLOBAL_EXACT_BREAKPOINT __BIT(9) +#define X86_HW_WATCHPOINT_DR7_RESTRICTED_TRANSACTIONAL_MEMORY __BIT(11) +#define X86_HW_WATCHPOINT_DR7_GENERAL_DETECT_ENABLE __BIT(13) -#endif +#define X86_HW_WATCHPOINT_DR7_DR0_CONDITION_MASK __BITS(16, 17) +#define X86_HW_WATCHPOINT_DR7_DR0_LENGTH_MASK __BITS(18, 19) +#define X86_HW_WATCHPOINT_DR7_DR1_CONDITION_MASK __BITS(20, 21) +#define X86_HW_WATCHPOINT_DR7_DR1_LENGTH_MASK __BITS(22, 23) +#define X86_HW_WATCHPOINT_DR7_DR2_CONDITION_MASK __BITS(24, 25) +#define X86_HW_WATCHPOINT_DR7_DR2_LENGTH_MASK __BITS(26, 27) +#define X86_HW_WATCHPOINT_DR7_DR3_CONDITION_MASK __BITS(28, 29) +#define X86_HW_WATCHPOINT_DR7_DR3_LENGTH_MASK __BITS(30, 31) -#endif /* _X86_FPU_H_ */ +#endif /* !defined(_KMEMUSER) && !defined(_KERNEL) */ + +/* + * X86_HW_WATCHPOINT_DR7_CONDITION_IO_READWRITE is unused + * it requires DE (debug extension) flag in control register CR4 set + * not all CPUs support it + */ +enum x86_hw_watchpoint_condition { + X86_HW_WATCHPOINT_DR7_CONDITION_EXECUTION = 0x0, + X86_HW_WATCHPOINT_DR7_CONDITION_DATA_WRITE = 0x1, + X86_HW_WATCHPOINT_DR7_CONDITION_IO_READWRITE = 0x2, + X86_HW_WATCHPOINT_DR7_CONDITION_DATA_READWRITE = 0x3 +}; + +/* + * 0x2 is currently unimplemented - it reflects 8 bytes on modern CPUs + */ +enum x86_hw_watchpoint_length { + X86_HW_WATCHPOINT_DR7_LENGTH_BYTE = 0x0, + X86_HW_WATCHPOINT_DR7_LENGTH_TWOBYTES = 0x1, + /* 0x2 undefined */ + X86_HW_WATCHPOINT_DR7_LENGTH_FOURBYTES = 0x3 +}; + +#if defined(_KMEMUSER) || defined(_KERNEL) + +/* + * The number of available watchpoint registers available since Intel 80386 + * New CPUs ship with up to 16 Debug Registers but they still offer four + * watchpoints, while there other registers are reserved + */ +#define X86_HW_WATCHPOINTS 4 + +/* + * lwpid - 0 means all LWPs in the process + * address - 0 means that watchpoint is disabled + */ +struct x86_hw_watchpoint { + vaddr_t address; + enum x86_hw_watchpoint_condition condition; + enum x86_hw_watchpoint_length length; +}; + +/* + * Set CPU Debug Registers - to be used before entering user-land context + */ +void set_x86_hw_watchpoints(struct lwp *l); + +/* + * Reset CPU Debug Registers - to be used after entering kernel context + */ +void clear_x86_hw_watchpoints(void); + +/* + * Check if trap is triggered from user-land if so return nonzero value + * + * This resets Debug Status Register (DR6) break point detection + */ +int user_trap_x86_hw_watchpoint(void); + +#endif /* !defined(_KMEMUSER) && !defined(_KERNEL) */ + +#endif /* !_X86_DBREGS_H_ */ Index: sys/arch/x86/x86/dbregs.c =================================================================== RCS file: sys/arch/x86/x86/dbregs.c diff -N sys/arch/x86/x86/dbregs.c --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ sys/arch/x86/x86/dbregs.c 12 Dec 2016 23:35:58 -0000 @@ -0,0 +1,221 @@ +/* $NetBSD: dbregs.h,v 1.1 2016/11/27 14:49:21 kamil Exp $ */ + +/*- + * Copyright (c) 2016 The NetBSD Foundation, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + +#include +#include +#include +#include +#include + +static void +set_x86_hw_watchpoint(size_t idx, vaddr_t address, + enum x86_hw_watchpoint_condition condition, + enum x86_hw_watchpoint_length length) +{ + register_t dr; + + KASSERT(address < VM_MAXUSER_ADDRESS); + + /* Read the original DR7 value in order to save existing watchpoints */ + dr = rdr7(); + + switch (idx) { + case 0: + ldr0(address); + dr |= X86_HW_WATCHPOINT_DR7_GLOBAL_DR0_BREAKPOINT; + dr |= __SHIFTIN(condition, + X86_HW_WATCHPOINT_DR7_DR0_CONDITION_MASK); + dr |= __SHIFTIN(length, + X86_HW_WATCHPOINT_DR7_DR0_LENGTH_MASK); + break; + case 1: + ldr1(address); + dr |= X86_HW_WATCHPOINT_DR7_GLOBAL_DR1_BREAKPOINT; + dr |= __SHIFTIN(condition, + X86_HW_WATCHPOINT_DR7_DR1_CONDITION_MASK); + dr |= __SHIFTIN(length, + X86_HW_WATCHPOINT_DR7_DR1_LENGTH_MASK); + break; + case 2: + ldr2(address); + dr |= X86_HW_WATCHPOINT_DR7_GLOBAL_DR2_BREAKPOINT; + dr |= __SHIFTIN(condition, + X86_HW_WATCHPOINT_DR7_DR2_CONDITION_MASK); + dr |= __SHIFTIN(length, + X86_HW_WATCHPOINT_DR7_DR2_LENGTH_MASK); + break; + case 3: + ldr3(address); + dr |= X86_HW_WATCHPOINT_DR7_GLOBAL_DR3_BREAKPOINT; + dr |= __SHIFTIN(condition, + X86_HW_WATCHPOINT_DR7_DR3_CONDITION_MASK); + dr |= __SHIFTIN(length, + X86_HW_WATCHPOINT_DR7_DR3_LENGTH_MASK); + break; + } + + ldr7(dr); +} + +void +set_x86_hw_watchpoints(struct lwp *l) +{ + size_t i; + + /* Assert that Debug Registers are not mixed with Debug Trap Flag */ + KASSERT((l->l_md.md_regs->tf_rflags & PSL_T) == 0); + + /* Assert that there are available watchpoints */ + KASSERT(l->l_md.md_flags & MDL_X86_HW_WATCHPOINTS); + + /* Clear Debug Control Register (DR7) first */ + ldr7(0); + + /* + * Clear Debug Status Register (DR6) as these bits are never cleared + * automatically by the processor + * + * Clear BREAKPOINT_CONDITION_DETECTED bits and ignore the rest + */ + ldr6(rdr6() & + ~(X86_HW_WATCHPOINT_DR6_DR0_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR1_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR2_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR3_BREAKPOINT_CONDITION_DETECTED)); + + for (i = 0; i < X86_HW_WATCHPOINTS; i++) { + if (l->l_md.md_watchpoint[i].address != 0) { + set_x86_hw_watchpoint(i, + l->l_md.md_watchpoint[i].address, + l->l_md.md_watchpoint[i].condition, + l->l_md.md_watchpoint[i].length); + } + } +} + +void +clear_x86_hw_watchpoints(void) +{ + + /* + * It's sufficient to just disable Debug Control Register (DR7) + * it will deactivate hardware watchpoints + */ + ldr7(0); + /* + * However at some point we need to clear Debug Status Registers (DR6) + * CPU will never do it automatically + * + * Clear BREAKPOINT_CONDITION_DETECTED bits and ignore the rest + */ + ldr6(rdr6() & + ~(X86_HW_WATCHPOINT_DR6_DR0_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR1_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR2_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR3_BREAKPOINT_CONDITION_DETECTED)); +} + +int +user_trap_x86_hw_watchpoint(void) +{ + register_t dr7, dr6; /* debug registers dr6 and dr7 */ + register_t bp; /* breakpoint bits extracted from dr6 */ + int nbp; /* number of breakpoints that triggered */ + vaddr_t addr[X86_HW_WATCHPOINTS]; /* breakpoint addresses */ + int i; + + dr7 = rdr7(); + if ((dr7 & + (X86_HW_WATCHPOINT_DR7_GLOBAL_DR0_BREAKPOINT | + X86_HW_WATCHPOINT_DR7_GLOBAL_DR1_BREAKPOINT | + X86_HW_WATCHPOINT_DR7_GLOBAL_DR2_BREAKPOINT | + X86_HW_WATCHPOINT_DR7_GLOBAL_DR3_BREAKPOINT)) == 0) { + /* + * all Global Breakpoint bits in the DR7 register are zero, + * thus the trap couldn't have been caused by the + * hardware debug registers + */ + return 0; + } + + nbp = 0; + dr6 = rdr6(); + bp = dr6 & \ + (X86_HW_WATCHPOINT_DR6_DR0_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR1_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR2_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR3_BREAKPOINT_CONDITION_DETECTED); + + if (!bp) { + /* + * None of the breakpoint bits are set meaning this + * trap was not caused by any of the debug registers + */ + return 0; + } + + /* + * at least one of the breakpoints were hit, check to see + * which ones and if any of them are user space addresses + */ + + if (bp & X86_HW_WATCHPOINT_DR6_DR0_BREAKPOINT_CONDITION_DETECTED) + addr[nbp++] = (vaddr_t)rdr0(); + if (bp & X86_HW_WATCHPOINT_DR6_DR1_BREAKPOINT_CONDITION_DETECTED) + addr[nbp++] = (vaddr_t)rdr1(); + if (bp & X86_HW_WATCHPOINT_DR6_DR2_BREAKPOINT_CONDITION_DETECTED) + addr[nbp++] = (vaddr_t)rdr2(); + if (bp & X86_HW_WATCHPOINT_DR6_DR3_BREAKPOINT_CONDITION_DETECTED) + addr[nbp++] = (vaddr_t)rdr3(); + + for (i = 0; i < nbp; i++) { + /* Check if addr[i] is in user space */ + if (addr[i] >= (vaddr_t)VM_MAXUSER_ADDRESS) + continue; + + /* + * Clear Status Register (DR6) now as it's not done by CPU. + * + * Clear BREAKPOINT_CONDITION_DETECTED bits and ignore + * the rest. + */ + ldr6(dr6 & + ~(X86_HW_WATCHPOINT_DR6_DR0_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR1_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR2_BREAKPOINT_CONDITION_DETECTED | + X86_HW_WATCHPOINT_DR6_DR3_BREAKPOINT_CONDITION_DETECTED)); + + return nbp; + } + + /* + * None of the breakpoints are in user space. + */ + return 0; +} Index: sys/arch/x86/x86/vm_machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/x86/x86/vm_machdep.c,v retrieving revision 1.26 diff -u -r1.26 vm_machdep.c --- sys/arch/x86/x86/vm_machdep.c 8 Nov 2016 03:05:36 -0000 1.26 +++ sys/arch/x86/x86/vm_machdep.c 12 Dec 2016 23:36:00 -0000 @@ -231,6 +231,12 @@ pcb2->pcb_esp = (int)sf; pcb2->pcb_ebp = (int)l2; #endif + + /* + * Do not inherit hardware watchpoints. If they are desired, userland + * should do it on its own. + */ + memset(l2->l_md.md_watchpoint, 0, sizeof(*l2->l_md.md_watchpoint)); } /* Index: sys/compat/netbsd32/netbsd32_ptrace.c =================================================================== RCS file: /cvsroot/src/sys/compat/netbsd32/netbsd32_ptrace.c,v retrieving revision 1.2 diff -u -r1.2 netbsd32_ptrace.c --- sys/compat/netbsd32/netbsd32_ptrace.c 2 Nov 2016 00:11:59 -0000 1.2 +++ sys/compat/netbsd32/netbsd32_ptrace.c 12 Dec 2016 23:36:00 -0000 @@ -58,6 +58,8 @@ static void netbsd32_copyoutpiod(const struct ptrace_io_desc *, void *); static int netbsd32_doregs(struct lwp *, struct lwp *, struct uio *); static int netbsd32_dofpregs(struct lwp *, struct lwp *, struct uio *); +static int netbsd32_dowatchpoint(struct lwp *, struct lwp *, int, + struct ptrace_watchpoint *, void *, register_t *); static int @@ -165,11 +167,31 @@ #endif } +static int +netbsd32_dowatchpoint(struct lwp *curl /*tracer*/, struct lwp *l /*traced*/, + int write, struct ptrace_watchpoint *pw, void *addr, register_t *retval) +{ + +#ifdef notyet // __HAVE_PTRACE_WATCHPOINTS + process_watchpoint32 pw32; + + /* unimplemented */ + + if (write == 0) + return process_write_watchpoint32(l, &pw32); + else + return process_read_watchpoint32(l, &pw32); +#else + return EINVAL; +#endif +} + static struct ptrace_methods netbsd32_ptm = { .ptm_copyinpiod = netbsd32_copyinpiod, .ptm_copyoutpiod = netbsd32_copyoutpiod, .ptm_doregs = netbsd32_doregs, - .ptm_dofpregs = netbsd32_dofpregs + .ptm_dofpregs = netbsd32_dofpregs, + .ptm_dowatchpoint = netbsd32_dowatchpoint }; Index: sys/kern/sys_ptrace.c =================================================================== RCS file: /cvsroot/src/sys/kern/sys_ptrace.c,v retrieving revision 1.2 diff -u -r1.2 sys_ptrace.c --- sys/kern/sys_ptrace.c 3 Nov 2016 03:57:05 -0000 1.2 +++ sys/kern/sys_ptrace.c 12 Dec 2016 23:36:05 -0000 @@ -169,6 +169,7 @@ .ptm_copyoutpiod = ptrace_copyoutpiod, .ptm_doregs = process_doregs, .ptm_dofpregs = process_dofpregs, + .ptm_dowatchpoint = process_dowatchpoint, }; static const struct syscall_package ptrace_syscalls[] = { Index: sys/kern/sys_ptrace_common.c =================================================================== RCS file: /cvsroot/src/sys/kern/sys_ptrace_common.c,v retrieving revision 1.6 diff -u -r1.6 sys_ptrace_common.c --- sys/kern/sys_ptrace_common.c 5 Dec 2016 22:07:16 -0000 1.6 +++ sys/kern/sys_ptrace_common.c 12 Dec 2016 23:36:08 -0000 @@ -202,6 +202,11 @@ #ifdef PT_SETFPREGS case PT_SETFPREGS: #endif +#ifdef __HAVE_PTRACE_WATCHPOINTS + case PT_READ_WATCHPOINT: + case PT_WRITE_WATCHPOINT: + case PT_COUNT_WATCHPOINTS: +#endif case PT_SET_EVENT_MASK: case PT_GET_EVENT_MASK: case PT_GET_PROCESS_STATE: @@ -295,6 +300,9 @@ struct ptrace_event pe; struct ptrace_state ps; struct ptrace_lwpinfo pl; +#ifdef __HAVE_PTRACE_WATCHPOINTS + struct ptrace_watchpoint pw; +#endif struct vmspace *vm; int error, write, tmp, pheld; int signo = 0; @@ -405,6 +413,11 @@ #ifdef PT_SETFPREGS case PT_SETFPREGS: #endif +#ifdef __HAVE_PTRACE_WATCHPOINTS + case PT_READ_WATCHPOINT: + case PT_WRITE_WATCHPOINT: + case PT_COUNT_WATCHPOINTS: +#endif #ifdef __HAVE_PTRACE_MACHDEP PTRACE_MACHDEP_REQUEST_CASES #endif @@ -993,6 +1006,54 @@ break; #endif +#ifdef __HAVE_PTRACE_WATCHPOINTS + /* + * The "write" variable is used as type of operation. + * Possible values: + * 0 - return the number of supported hardware watchpoints + * 1 - set new watchpoint value + * 2 - get existing watchpoint image + */ + case PT_WRITE_WATCHPOINT: + write = 1; + case PT_READ_WATCHPOINT: + /* write = 0 done above */ + + if (data != sizeof(pw)) { + DPRINTF(("ptrace(%d): %d != %zu\n", req, + data, sizeof(pe))); + error = EINVAL; + break; + } + error = copyin(addr, &pw, sizeof(pw)); + if (error) + break; + tmp = pw.pw_lwpid; + if (tmp != 0 && t->p_nlwps > 1) { + lwp_delref(lt); + mutex_enter(t->p_lock); + lt = lwp_find(t, tmp); + if (lt == NULL) { + mutex_exit(t->p_lock); + error = ESRCH; + break; + } + lwp_addref(lt); + mutex_exit(t->p_lock); + } + ++write; + case PT_COUNT_WATCHPOINTS: + if (!process_validwatchpoint(lt)) + error = EINVAL; + else { + lwp_lock(lt); + error = ptm->ptm_dowatchpoint(l, lt, write, &pw, addr, + retval); + lwp_unlock(lt); + } + break; +#endif + #ifdef __HAVE_PTRACE_MACHDEP PTRACE_MACHDEP_REQUEST_CASES error = ptrace_machdep_dorequest(l, lt, req, addr, data); @@ -1135,6 +1196,45 @@ #endif return 0; } + +int +process_dowatchpoint(struct lwp *curl /*tracer*/, struct lwp *l /*traced*/, + int operation, struct ptrace_watchpoint *pw, void *addr, + register_t *retval) +{ + +#ifdef __HAVE_PTRACE_WATCHPOINTS + int error; + + KASSERT(operation >= 0); + KASSERT(operation <= 2); + + switch (operation) { + case 0: + return process_count_watchpoints(l, retval); + case 1: + error = process_read_watchpoint(l, pw); + if (error) + return error; + return copyout(pw, addr, sizeof(*pw)); + default: + return process_write_watchpoint(l, pw); + } +#else + return EINVAL; +#endif +} + +int +process_validwatchpoint(struct lwp *l) +{ + +#ifdef __HAVE_PTRACE_WATCHPOINTS + return (l->l_flag & LW_SYSTEM) == 0; +#else + return 0; +#endif +} #endif /* PTRACE */ MODULE(MODULE_CLASS_EXEC, ptrace_common, ""); @@ -1158,4 +1258,3 @@ } return error; } - Index: sys/sys/ptrace.h =================================================================== RCS file: /cvsroot/src/sys/sys/ptrace.h,v retrieving revision 1.49 diff -u -r1.49 ptrace.h --- sys/sys/ptrace.h 4 Nov 2016 18:14:04 -0000 1.49 +++ sys/sys/ptrace.h 12 Dec 2016 23:36:09 -0000 @@ -118,6 +118,19 @@ #define PL_EVENT_NONE 0 #define PL_EVENT_SIGNAL 1 +#ifdef __HAVE_PTRACE_WATCHPOINTS +/* + * Hardware Watchpoints + * + * MD code handles switch informing whether a particular watchpoint is enabled + */ +typedef struct ptrace_watchpoint { + int pw_index; /* HW Watchpoint ID (count from 0) */ + lwpid_t pw_lwpid; /* LWP described */ + struct mdpw pw_md; /* MD fields */ +} ptrace_watchpoint_t; +#endif + #ifdef _KERNEL #if defined(PT_GETREGS) || defined(PT_SETREGS) @@ -138,12 +151,22 @@ #define process_fpreg64 struct fpreg #endif #endif +#ifdef __HAVE_PTRACE_WATCHPOINTS +#ifndef process_watchpoint32 +#define process_watchpoint32 struct ptrace_watchpoint +#endif +#ifndef process_watchpoint64 +#define process_watchpoint64 struct ptrace_watchpoint +#endif +#endif struct ptrace_methods { int (*ptm_copyinpiod)(struct ptrace_io_desc *, const void *); void (*ptm_copyoutpiod)(const struct ptrace_io_desc *, void *); int (*ptm_doregs)(struct lwp *, struct lwp *, struct uio *); int (*ptm_dofpregs)(struct lwp *, struct lwp *, struct uio *); + int (*ptm_dowatchpoint)(struct lwp *, struct lwp *, int, + struct ptrace_watchpoint *, void *, register_t *); }; int ptrace_init(void); @@ -156,6 +179,10 @@ int process_dofpregs(struct lwp *, struct lwp *, struct uio *); int process_validfpregs(struct lwp *); +int process_dowatchpoint(struct lwp *, struct lwp *, int, + struct ptrace_watchpoint *, void *, register_t *); +int process_validwatchpoint(struct lwp *); + int process_domem(struct lwp *, struct lwp *, struct uio *); void process_stoptrace(void); @@ -211,6 +238,32 @@ #endif #endif +#ifdef __HAVE_PTRACE_WATCHPOINTS +int process_count_watchpoints(struct lwp *, register_t *retval); +#ifndef process_count_watchpoints32 +#define process_count_watchpoints32 process_count_watchpoints +#endif +#ifndef process_count_watchpoints64 +#define process_count_watchpoints64 process_count_watchpoints +#endif + +int process_read_watchpoint(struct lwp *, struct ptrace_watchpoint *); +#ifndef process_read_watchpoint32 +#define process_read_watchpoint32 process_read_watchpoint +#endif +#ifndef process_read_watchpoint64 +#define process_read_watchpoint64 process_read_watchpoint +#endif + +int process_write_watchpoint(struct lwp *, struct ptrace_watchpoint *); +#ifndef process_write_watchpoint32 +#define process_write_watchpoint32 process_write_watchpoint +#endif +#ifndef process_write_watchpoint64 +#define process_write_watchpoint64 process_write_watchpoint +#endif +#endif + #ifdef __HAVE_PROCFS_MACHDEP int ptrace_machdep_dorequest(struct lwp *, struct lwp *, int, void *, int);